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Searched refs:isBeforeLegalizeOps (Results 1 – 9 of 9) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp438 !DCI.isBeforeLegalizeOps()); in SimplifyDemandedBits()
1426 !DCI.isBeforeLegalizeOps()); in SimplifyDemandedVectorElts()
2081 if (DCI.isBeforeLegalizeOps() || in simplifySetCCWithAnd()
2225 (DCI.isBeforeLegalizeOps() || in SimplifySetCC()
2469 if (DCI.isBeforeLegalizeOps() || in SimplifySetCC()
2527 if (DCI.isBeforeLegalizeOps() || in SimplifySetCC()
2631 if ((DCI.isBeforeLegalizeOps() || in SimplifySetCC()
2651 if ((DCI.isBeforeLegalizeOps() || in SimplifySetCC()
2701 if (!VT.isVector() || DCI.isBeforeLegalizeOps()) { in SimplifySetCC()
2838 if (DCI.isBeforeLegalizeOps() || in SimplifySetCC()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp568 if (DCI.isBeforeLegalizeOps()) in performDivRemCombine()
677 if (DCI.isBeforeLegalizeOps()) in performSELECTCombine()
756 if (DCI.isBeforeLegalizeOps()) in performCMovFPCombine()
783 if (DCI.isBeforeLegalizeOps() || !Subtarget.hasExtractInsert()) in performANDCombine()
869 if (DCI.isBeforeLegalizeOps() || !Subtarget.hasExtractInsert()) in performORCombine()
1057 if (DCI.isBeforeLegalizeOps()) { in performSUBCombine()
1072 if (DCI.isBeforeLegalizeOps()) { in performADDCombine()
1107 if (DCI.isBeforeLegalizeOps() || !Subtarget.hasCnMips()) in performSHLCombine()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp8847 if (DCI.isBeforeLegalizeOps()) in performXorCombine()
8902 if (DCI.isBeforeLegalizeOps()) in performMulCombine()
9135 if (ResTy == MVT::v4i64 && DCI.isBeforeLegalizeOps()) in performFpToIntCombine()
9208 if (ResTy == MVT::v4i64 && DCI.isBeforeLegalizeOps()) in performFDivCombine()
9387 if (DCI.isBeforeLegalizeOps()) in performBitcastCombine()
9492 if (DCI.isBeforeLegalizeOps()) in performConcatVectorsCombine()
9537 if (DCI.isBeforeLegalizeOps()) in tryCombineFixedPointConvert()
9779 if (DCI.isBeforeLegalizeOps()) in performAddSubLongCombine()
9828 if (DCI.isBeforeLegalizeOps()) in tryCombineLongOpWithDup()
10042 if (!DCI.isBeforeLegalizeOps()) in performExtendCombine()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1601 !DCI.isBeforeLegalizeOps()); in PerformDAGCombine()
1617 !DCI.isBeforeLegalizeOps()); in PerformDAGCombine()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DTargetLowering.h3023 bool isBeforeLegalizeOps() const { return Level < AfterLegalizeVectorOps; } in isBeforeLegalizeOps() function
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp32785 if (DCI.isBeforeLegalizeOps()) in XFormVExtractWithShuffleIntoLoad()
33017 if (!DCI.isBeforeLegalizeOps()) in combineCastedMaskArithmetic()
33650 if (DCI.isBeforeLegalizeOps()) in combineExtractWithShuffle()
36385 if (DCI.isBeforeLegalizeOps()) in combineAnd()
36707 if (DCI.isBeforeLegalizeOps()) in combineOr()
38767 if (DCI.isBeforeLegalizeOps()) in combineXor()
39263 if (!DCI.isBeforeLegalizeOps()) in combineToExtendBoolVectorInReg()
39355 if (!DCI.isBeforeLegalizeOps()) in combineToExtendVectorInReg()
39702 if (DCI.isBeforeLegalizeOps()) in combineZext()
41179 if (DCI.isBeforeLegalizeOps()) in combineInsertSubvector()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1996 if (DCI.isBeforeLegalizeOps() || in PerformDAGCombine()
H A DAMDGPUISelLowering.cpp3968 !DCI.isBeforeLegalizeOps()); in PerformDAGCombine()
H A DSIISelLowering.cpp8850 !DCI.isBeforeLegalizeOps()); in performCvtF32UByteNCombine()