Searched refs:intVT (Results 1 – 1 of 1) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 4863 EVT intVT = EVT::getIntegerVT(*DAG.getContext(), LoadedVT.getSizeInBits()); in expandUnalignedLoad() local
4864 if (isTypeLegal(intVT) && isTypeLegal(LoadedVT)) { in expandUnalignedLoad()
4865 if (!isOperationLegalOrCustom(ISD::LOAD, intVT) && in expandUnalignedLoad()
4876 SDValue newLoad = DAG.getLoad(intVT, dl, Chain, Ptr, in expandUnalignedLoad()
4888 MVT RegVT = getRegisterType(*DAG.getContext(), intVT); in expandUnalignedLoad()
5020 EVT intVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits()); in expandUnalignedStore() local
5021 if (isTypeLegal(intVT)) { in expandUnalignedStore()
5022 if (!isOperationLegalOrCustom(ISD::STORE, intVT) && in expandUnalignedStore()
5032 SDValue Result = DAG.getNode(ISD::BITCAST, dl, intVT, Val); in expandUnalignedStore()
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