| /freebsd-12.1/contrib/llvm/tools/clang/utils/TableGen/ |
| H A D | ClangCommentCommandInfoEmitter.cpp | 37 << Tag.getValueAsBit("IsInlineCommand") << ", " in EmitClangCommentCommandInfo() 38 << Tag.getValueAsBit("IsBlockCommand") << ", " in EmitClangCommentCommandInfo() 39 << Tag.getValueAsBit("IsBriefCommand") << ", " in EmitClangCommentCommandInfo() 40 << Tag.getValueAsBit("IsReturnsCommand") << ", " in EmitClangCommentCommandInfo() 41 << Tag.getValueAsBit("IsParamCommand") << ", " in EmitClangCommentCommandInfo() 42 << Tag.getValueAsBit("IsTParamCommand") << ", " in EmitClangCommentCommandInfo() 43 << Tag.getValueAsBit("IsThrowsCommand") << ", " in EmitClangCommentCommandInfo() 44 << Tag.getValueAsBit("IsDeprecatedCommand") << ", " in EmitClangCommentCommandInfo() 45 << Tag.getValueAsBit("IsHeaderfileCommand") << ", " in EmitClangCommentCommandInfo() 49 << Tag.getValueAsBit("IsVerbatimLineCommand") << ", " in EmitClangCommentCommandInfo() [all …]
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| H A D | ClangCommentHTMLTagsEmitter.cpp | 46 if (Tag->getValueAsBit("EndTagOptional")) in EmitClangCommentHTMLTagsProperties() 48 if (Tag->getValueAsBit("EndTagForbidden")) in EmitClangCommentHTMLTagsProperties()
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| H A D | ClangAttrEmitter.cpp | 2187 if (!R.getValueAsBit("ASTNode")) in EmitClangAttrClass() 2385 if (!R.getValueAsBit("ASTNode")) in EmitClangAttrImpl() 2704 if (!R.getValueAsBit("ASTNode")) in EmitClangAttrPCHRead() 2743 if (!R.getValueAsBit("ASTNode")) in EmitClangAttrPCHWrite() 3000 if (!R.getValueAsBit("ASTNode")) in EmitClangAttrASTVisitor() 3014 if (!R.getValueAsBit("ASTNode")) in EmitClangAttrASTVisitor() 3043 if (!R.getValueAsBit("ASTNode")) in EmitClangAttrASTVisitor() 3063 if (!R.getValueAsBit("ASTNode")) in EmitClangAttrTemplateInstantiateHelper() 3158 if (Arg->getValueAsBit("Fake")) in emitArgInfo() 3707 if (!R.getValueAsBit("ASTNode")) in EmitClangAttrTextNodeDump() [all …]
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| H A D | ClangASTNodesEmitter.cpp | 83 if (Base->getValue("Abstract") && !Base->getValueAsBit("Abstract")) in EmitNode() 88 bool Abstract = R->getValueAsBit("Abstract"); in EmitNode()
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| H A D | NeonEmitter.cpp | 2027 bool CartesianProductOfTypes = R->getValueAsBit("CartesianProductOfTypes"); in createIntrinsic() 2028 bool BigEndianSafe = R->getValueAsBit("BigEndianSafe"); in createIntrinsic() 2030 bool IsUnavailable = OperationRec->getValueAsBit("Unavailable"); in createIntrinsic() 2225 if (R->getValueAsBit("isVCVT_N")) { in genIntrinsicRangeCheckCode() 2237 } else if (R->getValueAsBit("isScalarShift")) { in genIntrinsicRangeCheckCode() 2245 } else if (R->getValueAsBit("isShift")) { in genIntrinsicRangeCheckCode() 2256 if (R->getValueAsBit("isLaneQ")) in genIntrinsicRangeCheckCode()
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| H A D | ClangOptionDocEmitter.cpp | 56 return R->getValue("DocFlatten") && R->getValueAsBit("DocFlatten"); in extractDocumentation()
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| /freebsd-12.1/contrib/llvm/utils/TableGen/ |
| H A D | CodeGenInstruction.cpp | 343 isReturn = R->getValueAsBit("isReturn"); in CodeGenInstruction() 345 isBranch = R->getValueAsBit("isBranch"); in CodeGenInstruction() 347 isCompare = R->getValueAsBit("isCompare"); in CodeGenInstruction() 348 isMoveImm = R->getValueAsBit("isMoveImm"); in CodeGenInstruction() 349 isMoveReg = R->getValueAsBit("isMoveReg"); in CodeGenInstruction() 350 isBitcast = R->getValueAsBit("isBitcast"); in CodeGenInstruction() 351 isSelect = R->getValueAsBit("isSelect"); in CodeGenInstruction() 353 isCall = R->getValueAsBit("isCall"); in CodeGenInstruction() 354 isAdd = R->getValueAsBit("isAdd"); in CodeGenInstruction() 355 isTrap = R->getValueAsBit("isTrap"); in CodeGenInstruction() [all …]
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| H A D | X86FoldTablesEmitter.cpp | 331 RegRec->getValueAsBit("hasVEX_4V") != in operator ()() 332 MemRec->getValueAsBit("hasVEX_4V") || in operator ()() 333 RegRec->getValueAsBit("hasEVEX_K") != in operator ()() 334 MemRec->getValueAsBit("hasEVEX_K") || in operator ()() 335 RegRec->getValueAsBit("hasEVEX_Z") != in operator ()() 336 MemRec->getValueAsBit("hasEVEX_Z") || in operator ()() 338 RegRec->getValueAsBit("hasEVEX_B") != 0 || in operator ()() 339 MemRec->getValueAsBit("hasEVEX_B") != 0 || in operator ()() 340 RegRec->getValueAsBit("hasEVEX_RC") != in operator ()() 341 MemRec->getValueAsBit("hasEVEX_RC") || in operator ()() [all …]
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| H A D | X86EVEX2VEXTablesEmitter.cpp | 121 RecV->getValueAsBit("hasVEX_4V") != RecE->getValueAsBit("hasVEX_4V") || in operator ()() 130 RecV->getValueAsBit("isAsmParserOnly") != in operator ()() 131 RecE->getValueAsBit("isAsmParserOnly")) in operator ()() 208 !Inst->TheDef->getValueAsBit("hasEVEX_K") && in run() 209 !Inst->TheDef->getValueAsBit("hasEVEX_B") && in run() 212 !Inst->TheDef->getValueAsBit("notEVEX2VEXConvertible")) in run()
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| H A D | X86RecognizableInstr.cpp | 85 HasREX_WPrefix = Rec->getValueAsBit("hasREX_WPrefix"); in RecognizableInstr() 86 HasVEX_4V = Rec->getValueAsBit("hasVEX_4V"); in RecognizableInstr() 88 IgnoresVEX_L = Rec->getValueAsBit("ignoresVEX_L"); in RecognizableInstr() 89 HasEVEX_L2Prefix = Rec->getValueAsBit("hasEVEX_L2"); in RecognizableInstr() 90 HasEVEX_K = Rec->getValueAsBit("hasEVEX_K"); in RecognizableInstr() 91 HasEVEX_KZ = Rec->getValueAsBit("hasEVEX_Z"); in RecognizableInstr() 92 HasEVEX_B = Rec->getValueAsBit("hasEVEX_B"); in RecognizableInstr() 93 IsCodeGenOnly = Rec->getValueAsBit("isCodeGenOnly"); in RecognizableInstr() 94 ForceDisassemble = Rec->getValueAsBit("ForceDisassemble"); in RecognizableInstr() 101 HasVEX_LPrefix = Rec->getValueAsBit("hasVEX_L"); in RecognizableInstr() [all …]
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| H A D | PredicateExpander.cpp | 390 if (Rec->getValueAsBit("UpdatesOpcodeMask")) in expandHeader() 398 if (Rec->getValueAsBit("OverridesBaseClassMember")) in expandHeader() 407 Fn.getDeclaration()->getValueAsBit("UpdatesOpcodeMask"); in expandPrologue() 472 Fn.getDeclaration()->getValueAsBit("UpdatesOpcodeMask"); in expandBody() 519 if (shouldExpandForMC() && !Rec->getValueAsBit("ExpandForMC")) in expandSTIPredicate()
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| H A D | CodeGenTarget.cpp | 379 if (CGI->TheDef->getValueAsBit("isPseudo")) in ComputeInstrsByEnum() 392 return std::make_tuple(!D1.getValueAsBit("isPseudo"), D1.getName()) < in ComputeInstrsByEnum() 393 std::make_tuple(!D2.getValueAsBit("isPseudo"), D2.getName()); in ComputeInstrsByEnum() 402 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding"); in isLittleEndianEncoding() 414 R->getValueAsBit("isPseudo")) in reverseBitsForLittleEndianEncoding() 449 return getInstructionSet()->getValueAsBit("guessInstructionProperties"); in guessInstructionProperties() 512 bool isTarget = Defs[I]->getValueAsBit("isTarget"); in CodeGenIntrinsicTable()
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| H A D | CodeEmitterGen.cpp | 197 getValueAsBit("noNamedPositionallyEncodedOperands")) { in getInstructionCase() 254 R->getValueAsBit("isPseudo")) { in run() 279 R->getValueAsBit("isPseudo")) in run()
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| H A D | SubtargetFeatureInfo.h | 50 return TheDef->getValueAsBit("RecomputePerFunction"); in mustRecomputePerFunction()
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| H A D | CallingConvEmitter.cpp | 43 if (!CC->getValueAsBit("Custom")) { in run() 55 if (!CC->getValueAsBit("Custom")) in run()
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| H A D | OptParserEmitter.cpp | 51 bool ASent = A->getValueAsDef("Kind")->getValueAsBit("Sentinel"); in CompareOptionRecords() 52 bool BSent = B->getValueAsDef("Kind")->getValueAsBit("Sentinel"); in CompareOptionRecords()
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| H A D | SubtargetEmitter.cpp | 1068 if (WriteRes->getValueAsBit("Unsupported")) { in GenSchedClassTables() 1074 SCDesc.BeginGroup |= WriteRes->getValueAsBit("BeginGroup"); in GenSchedClassTables() 1075 SCDesc.EndGroup |= WriteRes->getValueAsBit("EndGroup"); in GenSchedClassTables() 1076 SCDesc.BeginGroup |= WriteRes->getValueAsBit("SingleIssue"); in GenSchedClassTables() 1077 SCDesc.EndGroup |= WriteRes->getValueAsBit("SingleIssue"); in GenSchedClassTables() 1135 if (ReadAdvance->getValueAsBit("Unsupported")) { in GenSchedClassTables() 1338 (PM.ModelDef ? PM.ModelDef->getValueAsBit("PostRAScheduler") : false); in EmitProcessorModels() 1344 (PM.ModelDef ? PM.ModelDef->getValueAsBit("CompleteModel") : false); in EmitProcessorModels()
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| H A D | SearchableTableEmitter.cpp | 236 bool LHSpseudo = LHSr->getValueAsBit("isPseudo"); in compareBy() 237 bool RHSpseudo = RHSr->getValueAsBit("isPseudo"); in compareBy() 692 TableRec->getValueAsBit("PrimaryKeyEarlyOut")); in run() 714 IndexRec->getValueAsBit("EarlyOut"))); in run()
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| H A D | SubtargetFeatureInfo.cpp | 36 if (!Pred->getValueAsBit("AssemblerMatcherPredicate")) in getAll()
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| H A D | AsmMatcherEmitter.cpp | 552 TheDef->getValueAsBit("UseInstAsmMatchConverter")) { in MatchableInfo() 1478 bool HasMnemonicFirst = AsmParser->getValueAsBit("HasMnemonicFirst"); in buildInfo() 1480 AsmParser->getValueAsBit("ReportMultipleNearMisses"); in buildInfo() 1509 if (CGI->TheDef->getValueAsBit("isCodeGenOnly")) in buildInfo() 2606 AsmParser->getValueAsBit("AllowDuplicateRegisterNames"); in emitMatchRegisterName() 2639 AsmParser->getValueAsBit("AllowDuplicateRegisterNames"); in emitMatchRegisterAltName() 3165 bool HasMnemonicFirst = AsmParser->getValueAsBit("HasMnemonicFirst"); in run() 3168 AsmParser->getValueAsBit("ReportMultipleNearMisses"); in run() 3227 if (AsmParser->getValueAsBit("ShouldEmitMatchRegisterName")) in run() 3230 if (AsmParser->getValueAsBit("ShouldEmitMatchRegisterAltName")) in run()
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| H A D | FixedLenDecoderEmitter.cpp | 1771 bool HasCompleteInstDecoder = Def.getValueAsBit("hasCompleteDecoder"); in populateInstruction() 1810 getValueAsBit("decodePositionallyEncodedOperands")) { in populateInstruction() 1816 getValueAsBit("noNamedPositionallyEncodedOperands")) in populateInstruction() 2351 Def->getValueAsBit("isPseudo") || in run() 2352 Def->getValueAsBit("isAsmParserOnly") || in run() 2353 Def->getValueAsBit("isCodeGenOnly")) in run()
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| H A D | CodeGenSchedule.h | 66 IsVariadic = Def->getValueAsBit("Variadic"); in CodeGenSchedRW() 473 assert(ModelDef->getValueAsBit("NoModel") in getModelOrItinDef()
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| H A D | RISCVCompressInstEmitter.cpp | 468 return R->getValueAsBit("AssemblerMatcherPredicate"); in evaluateCompressPat() 628 return R->getValueAsBit("AssemblerMatcherPredicate"); in emitCompressInstEmitter()
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| H A D | InstrInfoEmitter.cpp | 228 if (!Inst->TheDef->getValueAsBit("UseNamedOperandTable")) in initOperandMapData()
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| H A D | CodeGenSchedule.cpp | 1087 RWModelDef->getValueAsBit("FullInstRWOverlapCheck")) { in createInstRWClass() 1794 RF->getValueAsBit("AllowZeroMoveEliminationOnly"); in collectRegisterFiles() 1929 if (!ProcModel.ModelDef->getValueAsBit("CompleteModel")) in checkCompleteness()
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