Searched refs:getShiftType (Results 1 – 6 of 6) sorted by relevance
265 assert(AArch64_AM::getShiftType(MO1.getImm()) == AArch64_AM::LSL && in getAddSubImmOpValue()525 assert(AArch64_AM::getShiftType(ShiftOpnd) == AArch64_AM::LSL && in getImm8OptLsl()
74 static inline AArch64_AM::ShiftExtendType getShiftType(unsigned Imm) { in getShiftType() function
956 if (AArch64_AM::getShiftType(Val) == AArch64_AM::LSL && in printShifter()959 O << ", " << AArch64_AM::getShiftExtendName(AArch64_AM::getShiftType(Val)) in printShifter()1511 assert(AArch64_AM::getShiftType(Shift) == AArch64_AM::LSL && in printImm8OptLsl()
48 let FunctionMapper = "AArch64_AM::getShiftType" in {
775 return AArch64_AM::getShiftType(Imm) == AArch64_AM::LSL && ShiftVal <= 5; in isFalkorShiftExtFast()801 (AArch64_AM::getShiftType(Imm) == AArch64_AM::ASR && ShiftVal == 31); in isFalkorShiftExtFast()809 (AArch64_AM::getShiftType(Imm) == AArch64_AM::ASR && ShiftVal == 63); in isFalkorShiftExtFast()
1901 if (AArch64_AM::getShiftType(ShiftTypeAndValue) == AArch64_AM::LSL) { in getUsefulBitsFromOrWithShiftedReg()1907 } else if (AArch64_AM::getShiftType(ShiftTypeAndValue) == AArch64_AM::LSR) { in getUsefulBitsFromOrWithShiftedReg()