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Searched refs:getSExtValue (Results 1 – 25 of 182) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonDepOperands.td14 def s4_0ImmPred : PatLeaf<(i32 imm), [{ return isShiftedInt<4, 0>(N->getSExtValue());}]>;
17 def s29_3ImmPred : PatLeaf<(i32 imm), [{ return isShiftedInt<32, 3>(N->getSExtValue());}]>;
20 def u6_0ImmPred : PatLeaf<(i32 imm), [{ return isShiftedUInt<6, 0>(N->getSExtValue());}]>;
23 def a30_2ImmPred : PatLeaf<(i32 imm), [{ return isShiftedInt<32, 2>(N->getSExtValue());}]>;
26 def u29_3ImmPred : PatLeaf<(i32 imm), [{ return isShiftedUInt<32, 3>(N->getSExtValue());}]>;
29 def s8_0ImmPred : PatLeaf<(i32 imm), [{ return isShiftedInt<8, 0>(N->getSExtValue());}]>;
35 def u4_2ImmPred : PatLeaf<(i32 imm), [{ return isShiftedUInt<4, 2>(N->getSExtValue());}]>;
38 def u3_0ImmPred : PatLeaf<(i32 imm), [{ return isShiftedUInt<3, 0>(N->getSExtValue());}]>;
47 def s4_3ImmPred : PatLeaf<(i32 imm), [{ return isShiftedInt<4, 3>(N->getSExtValue());}]>;
62 def s3_0ImmPred : PatLeaf<(i32 imm), [{ return isShiftedInt<3, 0>(N->getSExtValue());}]>;
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H A DHexagonOperands.td14 def s8_0Imm64Pred : PatLeaf<(i64 imm), [{ return isInt<8>(N->getSExtValue()); }]>;
20 int64_t v = (int64_t)N->getSExtValue();
24 int64_t v = (int64_t)N->getSExtValue();
H A DHexagonOptimizeSZextends.cpp112 if (!(C && C->getSExtValue() == 16)) in runOnFunction()
123 if (!(C && C->getSExtValue() == 16)) in runOnFunction()
H A DHexagonISelDAGToDAG.cpp71 int32_t Inc = cast<ConstantSDNode>(Offset.getNode())->getSExtValue(); in SelectIndexedLoad()
580 int32_t ShlConst = cast<ConstantSDNode>(Shl_1)->getSExtValue(); in SelectSHL()
587 int32_t ValConst = C->getSExtValue() << ShlConst; in SelectSHL()
603 if (C1->getSExtValue() != 0 || Sub_1.getOpcode() != ISD::SHL) in SelectSHL()
608 int32_t ValConst = 1 << (ShlConst + C2->getSExtValue()); in SelectSHL()
723 unsigned Opc = (cast<ConstantSDNode>(N)->getSExtValue() != 0) in SelectConstant()
813 int Mask = -cast<ConstantSDNode>(A.getNode())->getSExtValue(); in SelectVAlignAddr()
1579 int64_t V = CN->getSExtValue(); in isPositiveHalfWord()
1689 cast<ConstantSDNode>(L.Value)->getSExtValue() == 1) in push()
1692 cast<ConstantSDNode>(L.Value)->getSExtValue() == 0) in push()
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H A DHexagonIntrinsics.td113 int64_t V = N->getSExtValue();
151 int32_t V = N->getSExtValue();
156 int32_t V = N->getSExtValue();
244 int64_t v = (int64_t)(64 - N->getSExtValue());
249 int64_t v = (int64_t)(128 - N->getSExtValue());
254 int32_t Imm = N->getSExtValue();
259 int32_t Imm = N->getSExtValue();
/freebsd-12.1/contrib/llvm/lib/Target/Lanai/
H A DLanaiISelDAGToDAG.cpp97 return isInt<21>(CN.getSExtValue()) && ((CN.getSExtValue() & 0x3) == 0); in canBeRepresentedAsSls()
109 int32_t Imm = CN->getSExtValue(); in selectAddrSls()
130 if (isInt<16>(CN->getSExtValue())) { in selectAddrRiSpls()
131 int16_t Imm = CN->getSExtValue(); in selectAddrRiSpls()
143 if (isInt<10>(CN->getSExtValue())) { in selectAddrRiSpls()
144 int16_t Imm = CN->getSExtValue(); in selectAddrRiSpls()
174 if ((RiMode && isInt<16>(CN->getSExtValue())) || in selectAddrRiSpls()
175 (!RiMode && isInt<10>(CN->getSExtValue()))) { in selectAddrRiSpls()
186 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), DL, MVT::i32); in selectAddrRiSpls()
229 if (isInt<16>(CN->getSExtValue())) in selectAddrRr()
H A DLanaiTargetTransformInfo.h57 if (isInt<16>(Imm.getSExtValue())) in getIntImmCost()
61 if (isInt<32>(Imm.getSExtValue())) { in getIntImmCost()
62 if ((Imm.getSExtValue() & 0xFFFF) == 0) in getIntImmCost()
/freebsd-12.1/contrib/llvm/lib/Transforms/Utils/
H A DLowerSwitch.cpp236 UpperBound->getSExtValue() - LowerBound->getSExtValue(); in switchConvert()
266 int64_t GapLow = LHS.back().High->getSExtValue() + 1; in switchConvert()
267 int64_t GapHigh = NewLowerBound->getSExtValue() - 1; in switchConvert()
274 dbgs() << LowerBound->getSExtValue(); in switchConvert()
279 dbgs() << UpperBound->getSExtValue() << "\n"; in switchConvert()
352 uint64_t Range = Leaf.High->getSExtValue() - in newLeafBlock()
353 Leaf.Low->getSExtValue(); in newLeafBlock()
381 int64_t nextValue = J->Low->getSExtValue(); in Clusterify()
382 int64_t currentValue = I->High->getSExtValue(); in Clusterify()
461 int64_t Low = I.Low->getSExtValue(); in processSwitchInst()
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/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGAddressAnalysis.cpp92 Offset += C->getSExtValue(); in match()
97 Offset -= C->getSExtValue(); in match()
109 Offset += C->getSExtValue(); in match()
116 Offset += C->getSExtValue(); in match()
127 auto Off = C->getSExtValue(); in match()
170 Offset += cast<ConstantSDNode>(Index->getOperand(1))->getSExtValue(); in match()
/freebsd-12.1/contrib/llvm/lib/Target/ARC/
H A DARCISelDAGToDAG.cpp107 int32_t RHSC = RHS->getSExtValue(); in SelectAddrModeS9()
136 int32_t RHSC = RHS->getSExtValue(); in SelectAddrModeFar()
159 (CN->getSExtValue() % 4 == 0 && CN->getSExtValue() >= 0)) { in SelectFrameADDR_ri()
163 CurDAG->getTargetConstant(CN->getSExtValue(), SDLoc(Addr), MVT::i32); in SelectFrameADDR_ri()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCTargetTransformInfo.cpp64 if (isInt<16>(Imm.getSExtValue())) in getIntImmCost()
67 if (isInt<32>(Imm.getSExtValue())) { in getIntImmCost()
97 if ((Idx == 1) && Imm.getBitWidth() <= 64 && isInt<16>(Imm.getSExtValue())) in getIntImmCost()
101 if ((Idx < 2) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue()))) in getIntImmCost()
106 if ((Idx < 4) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue()))) in getIntImmCost()
172 if (isInt<16>(Imm.getSExtValue())) in getIntImmCost()
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZTargetTransformInfo.cpp51 if (isInt<32>(Imm.getSExtValue())) in getIntImmCost()
95 if (isInt<16>(Imm.getSExtValue())) in getIntImmCost()
102 if (isInt<32>(Imm.getSExtValue())) in getIntImmCost()
116 if (isUInt<32>(-Imm.getSExtValue())) in getIntImmCost()
123 if (isInt<32>(Imm.getSExtValue())) in getIntImmCost()
208 if (isUInt<32>(-Imm.getSExtValue())) in getIntImmCost()
216 if (isInt<32>(Imm.getSExtValue())) in getIntImmCost()
221 if ((Idx < 2) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue()))) in getIntImmCost()
226 if ((Idx < 4) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue()))) in getIntImmCost()
H A DSystemZOperands.td334 return isInt<8>(N->getSExtValue());
348 return isInt<16>(N->getSExtValue());
352 return isInt<16>(-N->getSExtValue());
369 return isInt<32>(-N->getSExtValue());
436 return isInt<8>(N->getSExtValue());
440 return isUInt<8>(N->getSExtValue());
444 return isInt<16>(N->getSExtValue());
448 return isInt<16>(-N->getSExtValue());
456 return isInt<32>(N->getSExtValue());
460 return isInt<32>(-N->getSExtValue());
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H A DSystemZISelDAGToDAG.cpp465 cast<ConstantSDNode>(Op0)->getSExtValue()); in expandAddress()
468 cast<ConstantSDNode>(Op1)->getSExtValue()); in expandAddress()
567 cast<ConstantSDNode>(Addr)->getSExtValue())) in selectAddress()
1493 isInt<16>(cast<ConstantSDNode>(Op1)->getSExtValue()) && in Select()
1495 isInt<16>(cast<ConstantSDNode>(Op0)->getSExtValue())))) { in Select()
1754 if (TrueOp->getSExtValue() != 1 && TrueOp->getSExtValue() != -1) in expandSelectBoolean()
1779 unsigned ShiftOp = TrueOp->getSExtValue() == 1 ? ISD::SRL : ISD::SRA; in expandSelectBoolean()
1786 if (TrueOp->getSExtValue() == 1) { in expandSelectBoolean()
/freebsd-12.1/contrib/llvm/lib/DebugInfo/PDB/Native/
H A DNativeSymbolEnumerator.cpp83 int64_t N = Record.Value.getSExtValue(); in getValue()
122 return Variant{Record.Value.getSExtValue()}; in getValue()
/freebsd-12.1/contrib/llvm/lib/Target/XCore/
H A DXCoreISelDAGToDAG.cpp99 && (CN->getSExtValue() % 4 == 0 && CN->getSExtValue() >= 0)) { in SelectADDRspii()
102 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), SDLoc(Addr), in SelectADDRspii()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMAddressingModes.h654 int32_t Exp = (Imm.lshr(10).getSExtValue() & 0x1f) - 15; // -14 to 15 in getFP16Imm()
680 int32_t Exp = (Imm.lshr(23).getSExtValue() & 0xff) - 127; // -126 to 127 in getFP32Imm()
708 int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023; // -1022 to 1023 in getFP64Imm()
/freebsd-12.1/contrib/llvm/tools/clang/lib/StaticAnalyzer/Checkers/
H A DUndefResultChecker.cpp145 OS << '\'' << I->getSExtValue() << "\', which is"; in checkPostStmt()
163 << LHS->getSExtValue() << "\' by \'" << RHS->getZExtValue() in checkPostStmt()
H A DMmapWriteExecChecker.cpp53 int64_t Prot = ProtLoc->getValue().getSExtValue(); in checkPreCall()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/GlobalISel/
H A DConstantFoldingMIRBuilder.h55 return buildConstant(Dst, MaybeCst->getSExtValue());
/freebsd-12.1/contrib/llvm/lib/Target/BPF/
H A DBPFISelDAGToDAG.cpp124 if (isInt<16>(CN->getSExtValue())) { in SelectAddr()
133 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), DL, MVT::i64); in SelectAddr()
153 if (isInt<16>(CN->getSExtValue())) { in SelectFIAddr()
161 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), DL, MVT::i64); in SelectFIAddr()
/freebsd-12.1/contrib/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp462 switch (C->getSExtValue()) { in getAVRCmp()
481 RHS = DAG.getConstant(C->getSExtValue() + 1, DL, VT); in getAVRCmp()
495 switch (C->getSExtValue()) { in getAVRCmp()
525 RHS = DAG.getConstant(C->getSExtValue() + 1, DL, VT); in getAVRCmp()
808 int RHSC = RHS->getSExtValue(); in getPreIndexedAddressParts()
859 int RHSC = RHS->getSExtValue(); in getPostIndexedAddressParts()
1783 if ((C->getSExtValue() >= -63) && (C->getSExtValue() <= 0)) { in getSingleConstraintMatchWeight()
1811 if (C->getSExtValue() == -1) { in getSingleConstraintMatchWeight()
1833 if ((C->getSExtValue() >= -6) && (C->getSExtValue() <= 5)) { in getSingleConstraintMatchWeight()
1929 int64_t CVal64 = C->getSExtValue(); in LowerAsmOperandForConstraint()
/freebsd-12.1/contrib/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp123 int64_t Imm = ConstNode->getSExtValue(); in Select()
249 Const->getSExtValue(), SDLoc(ImmOperand), ImmOperand.getValueType()); in doPeepholeLoadStoreADDI()
/freebsd-12.1/contrib/llvm/tools/lldb/source/Utility/
H A DScalar.cpp1206 return (schar_t)(m_integer.sextOrTrunc(sizeof(schar_t) * 8)).getSExtValue(); in SChar()
1213 return (schar_t)(ldbl_val.sextOrTrunc(sizeof(schar_t) * 8)).getSExtValue(); in SChar()
1259 .getSExtValue(); in SShort()
1267 .getSExtValue(); in SShort()
1314 return (sint_t)(m_integer.sextOrTrunc(sizeof(sint_t) * 8)).getSExtValue(); in SInt()
1321 return (sint_t)(ldbl_val.sextOrTrunc(sizeof(sint_t) * 8)).getSExtValue(); in SInt()
1366 return (slong_t)(m_integer.sextOrTrunc(sizeof(slong_t) * 8)).getSExtValue(); in SLong()
1373 return (slong_t)(ldbl_val.sextOrTrunc(sizeof(slong_t) * 8)).getSExtValue(); in SLong()
1419 .getSExtValue(); in SLongLong()
1427 .getSExtValue(); in SLongLong()
/freebsd-12.1/contrib/llvm/lib/Transforms/Scalar/
H A DLoopDataPrefetch.cpp153 unsigned AbsStride = std::abs(ConstStride->getAPInt().getSExtValue()); in isStrideLargeEnough()
291 int64_t PD = std::abs(ConstPtrDiff->getValue()->getSExtValue()); in runOnLoop()

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