Searched refs:getNumMicroOps (Results 1 – 9 of 9) sorted by relevance
108 unsigned TargetSchedModel::getNumMicroOps(const MachineInstr *MI, in getNumMicroOps() function in TargetSchedModel111 int UOps = InstrItins.getNumMicroOps(MI->getDesc().getSchedClass()); in getNumMicroOps()112 return (UOps >= 0) ? UOps : TII->getNumMicroOps(&InstrItins, *MI); in getNumMicroOps()
1905 RemIssueCount += SchedModel->getNumMicroOps(SU.getInstr(), SC) in init()1979 unsigned uops = SchedModel->getNumMicroOps(SU->getInstr()); in checkHazard()1982 << SchedModel->getNumMicroOps(SU->getInstr()) << '\n'); in checkHazard()2186 unsigned IncMOps = SchedModel->getNumMicroOps(SU->getInstr()); in bumpNode()
1060 unsigned TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() function in TargetInstrInfo
106 unsigned getNumMicroOps(const MachineInstr *MI,
1336 virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData,
226 int getNumMicroOps(unsigned ItinClassIndx) const { in getNumMicroOps() function
339 unsigned uops = SchedModel->getNumMicroOps(SU->getInstr()); in checkHazard()406 IssueCount += SchedModel->getNumMicroOps(SU->getInstr()); in bumpNode()
312 unsigned getNumMicroOps(const InstrItineraryData *ItinData,
3133 int UOps = ItinData->getNumMicroOps(Desc.getSchedClass()); in getNumMicroOpsSwiftLdSt()3425 unsigned ARMBaseInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() function in ARMBaseInstrInfo3432 int ItinUOps = ItinData->getNumMicroOps(Class); in getNumMicroOps()4451 if (!ItinData->isEmpty() && ItinData->getNumMicroOps(Class) < 0) in getInstrLatency()4452 return getNumMicroOps(ItinData, MI); in getInstrLatency()