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Searched refs:getNamedOperand (Results 1 – 21 of 21) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIPeepholeSDWA.cpp339 if (TII->getNamedOperand(*MI, AMDGPU::OpName::src0) == SrcOp) { in getSrcMods()
377 TII->getNamedOperand(MI, AMDGPU::OpName::src0_modifiers); in convertToSDWA()
381 Src = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in convertToSDWA()
382 SrcSel = TII->getNamedOperand(MI, AMDGPU::OpName::src1_sel); in convertToSDWA()
395 TII->getNamedOperand(MI, AMDGPU::OpName::dst_unused); in convertToSDWA()
751 OrSDWA = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in matchSDWAOperand()
752 OrOther = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in matchSDWAOperand()
922 NewMI.add(*TII->getNamedOperand(MI, AMDGPU::OpName::vdst)); in pseudoOpConvertToVOP2()
923 NewMI.add(*TII->getNamedOperand(MI, AMDGPU::OpName::src0)); in pseudoOpConvertToVOP2()
924 NewMI.add(*TII->getNamedOperand(MI, AMDGPU::OpName::src1)); in pseudoOpConvertToVOP2()
[all …]
H A DGCNDPPCombine.cpp159 assert(TII->getNamedOperand(MovMI, AMDGPU::OpName::vdst)->getReg() == in createDPPInst()
160 TII->getNamedOperand(OrigMI, AMDGPU::OpName::src0)->getReg()); in createDPPInst()
173 auto *Dst = TII->getNamedOperand(OrigMI, AMDGPU::OpName::vdst); in createDPPInst()
186 if (auto *Mod0 = TII->getNamedOperand(OrigMI, in createDPPInst()
194 auto *Src0 = TII->getNamedOperand(MovMI, AMDGPU::OpName::src0); in createDPPInst()
204 if (auto *Mod1 = TII->getNamedOperand(OrigMI, in createDPPInst()
268 auto *Src1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1); in foldOldOpnd()
309 auto *Imm = TII->getNamedOperand(MI, OpndName); in hasNoImmOrEqual()
325 auto *OldOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::old); in combineDPPMov()
366 TII->getNamedOperand(MovMI, AMDGPU::OpName::vdst)->getReg())) { in combineDPPMov()
[all …]
H A DSILoadStoreOptimizer.cpp786 TII->getNamedOperand(*CI.I, AMDGPU::OpName::addr); in mergeWrite2Pair()
788 TII->getNamedOperand(*CI.I, AMDGPU::OpName::data0); in mergeWrite2Pair()
790 TII->getNamedOperand(*CI.Paired, AMDGPU::OpName::data0); in mergeWrite2Pair()
858 .add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::sbase)) in mergeSBufferLoadImmPair()
905 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::vaddr)); in mergeBufferLoadPair()
907 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::srsrc)) in mergeBufferLoadPair()
1089 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::srsrc)) in mergeBufferStorePair()
1244 Src0 = TII->getNamedOperand(*BaseHiDef, AMDGPU::OpName::src0); in processBaseWithConstOffset()
1245 Src1 = TII->getNamedOperand(*BaseHiDef, AMDGPU::OpName::src1); in processBaseWithConstOffset()
1270 TII->getNamedOperand(MI, AMDGPU::OpName::vdata) != NULL) in promoteConstantOffsetToImm()
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H A DSIFixupVectorISel.cpp179 MachineOperand *Op = TII->getNamedOperand(MI, AMDGPU::OpName::vaddr); in fixupGlobalSaddr()
185 bool HasVdst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst) != nullptr; in fixupGlobalSaddr()
186 MachineOperand *VData = TII->getNamedOperand(MI, AMDGPU::OpName::vdata); in fixupGlobalSaddr()
195 NewGlob->addOperand(*TII->getNamedOperand(MI, AMDGPU::OpName::offset)); in fixupGlobalSaddr()
197 MachineOperand *Glc = TII->getNamedOperand(MI, AMDGPU::OpName::glc); in fixupGlobalSaddr()
201 NewGlob->addOperand(*TII->getNamedOperand(MI, AMDGPU::OpName::slc)); in fixupGlobalSaddr()
203 MachineOperand *VDstInOp = TII->getNamedOperand(MI, in fixupGlobalSaddr()
H A DSIOptimizeExecMaskingPreRA.cpp85 auto Op = TII.getNamedOperand(MI, AMDGPU::OpName::src1); in getOrNonExecReg()
88 Op = TII.getNamedOperand(MI, AMDGPU::OpName::src0); in getOrNonExecReg()
163 MachineOperand *Op1 = TII->getNamedOperand(*Cmp, AMDGPU::OpName::src0); in optimizeVcndVcmpPair()
164 MachineOperand *Op2 = TII->getNamedOperand(*Cmp, AMDGPU::OpName::src1); in optimizeVcndVcmpPair()
175 Op1 = TII->getNamedOperand(*Sel, AMDGPU::OpName::src0); in optimizeVcndVcmpPair()
176 Op2 = TII->getNamedOperand(*Sel, AMDGPU::OpName::src1); in optimizeVcndVcmpPair()
177 MachineOperand *CC = TII->getNamedOperand(*Sel, AMDGPU::OpName::src2); in optimizeVcndVcmpPair()
H A DSIAddIMGInit.cpp80 MachineOperand *TFE = TII->getNamedOperand(MI, AMDGPU::OpName::tfe); in runOnMachineFunction()
81 MachineOperand *LWE = TII->getNamedOperand(MI, AMDGPU::OpName::lwe); in runOnMachineFunction()
82 MachineOperand *D16 = TII->getNamedOperand(MI, AMDGPU::OpName::d16); in runOnMachineFunction()
104 TII->getNamedOperand(MI, AMDGPU::OpName::dmask); in runOnMachineFunction()
H A DSIInstrInfo.cpp276 getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOperandWithOffset()
279 BaseOp = getNamedOperand(LdSt, AMDGPU::OpName::addr); in getMemOperandWithOffset()
290 getNamedOperand(LdSt, AMDGPU::OpName::offset0); in getMemOperandWithOffset()
292 getNamedOperand(LdSt, AMDGPU::OpName::offset1); in getMemOperandWithOffset()
313 BaseOp = getNamedOperand(LdSt, AMDGPU::OpName::addr); in getMemOperandWithOffset()
333 getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOperandWithOffset()
347 getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOperandWithOffset()
363 if (getNamedOperand(LdSt, AMDGPU::OpName::saddr)) in getMemOperandWithOffset()
2310 getNamedOperand(MI, AMDGPU::OpName::src0_modifiers); in convertToThreeAddress()
2313 getNamedOperand(MI, AMDGPU::OpName::src1_modifiers); in convertToThreeAddress()
[all …]
H A DSIFoldOperands.cpp679 bool UseCopy = TII->getNamedOperand(*MI, AMDGPU::OpName::src2)->isReg(); in tryConstantFoldOp()
915 if (!TII->getNamedOperand(MI, AMDGPU::OpName::clamp)->getImm()) in isClamp()
919 const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in isClamp()
920 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in isClamp()
932 = TII->getNamedOperand(MI, AMDGPU::OpName::src0_modifiers)->getImm(); in isClamp()
934 = TII->getNamedOperand(MI, AMDGPU::OpName::src1_modifiers)->getImm(); in isClamp()
973 MachineOperand *DefClamp = TII->getNamedOperand(*Def, AMDGPU::OpName::clamp); in tryFoldClamp()
1034 const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in isOMod()
1035 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in isOMod()
1063 const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in isOMod()
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H A DSIRegisterInfo.cpp359 MachineOperand *FIOp = TII->getNamedOperand(MI, AMDGPU::OpName::vaddr); in resolveFrameIndex()
362 assert(TII->getNamedOperand(MI, AMDGPU::OpName::soffset)->getReg() == in resolveFrameIndex()
504 .add(*TII->getNamedOperand(*MI, AMDGPU::OpName::srsrc)) in buildMUBUFOffsetLoadStore()
505 .add(*TII->getNamedOperand(*MI, AMDGPU::OpName::soffset)) in buildMUBUFOffsetLoadStore()
512 const MachineOperand *VDataIn = TII->getNamedOperand(*MI, in buildMUBUFOffsetLoadStore()
1032 const MachineOperand *VData = TII->getNamedOperand(*MI, in eliminateFrameIndex()
1037 TII->getNamedOperand(*MI, AMDGPU::OpName::srsrc)->getReg(), in eliminateFrameIndex()
1039 TII->getNamedOperand(*MI, AMDGPU::OpName::offset)->getImm(), in eliminateFrameIndex()
1052 const MachineOperand *VData = TII->getNamedOperand(*MI, in eliminateFrameIndex()
1058 TII->getNamedOperand(*MI, AMDGPU::OpName::srsrc)->getReg(), in eliminateFrameIndex()
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H A DAMDGPUMacroFusion.cpp48 const MachineOperand *Src2 = TII.getNamedOperand(SecondMI, in shouldScheduleAdjacent()
H A DSIModeRegister.cpp246 unsigned Dst = TII->getNamedOperand(MI, AMDGPU::OpName::simm16)->getImm(); in processBlockPhase1()
267 unsigned Val = TII->getNamedOperand(MI, AMDGPU::OpName::imm)->getImm(); in processBlockPhase1()
H A DGCNHazardRecognizer.cpp118 const MachineOperand *RegOp = TII->getNamedOperand(RegInstr, in getHWReg()
528 TII->getNamedOperand(MI, AMDGPU::OpName::soffset); in createsVALUHazard()
628 TII->getNamedOperand(*RWLane, AMDGPU::OpName::src1); in checkRWLaneHazards()
H A DSIShrinkInstructions.cpp639 TII->getNamedOperand(MI, AMDGPU::OpName::src2); in runOnMachineFunction()
652 const MachineOperand *SDst = TII->getNamedOperand(MI, in runOnMachineFunction()
656 const MachineOperand *Src2 = TII->getNamedOperand(MI, in runOnMachineFunction()
H A DSIInstrInfo.h846 MachineOperand *getNamedOperand(MachineInstr &MI, unsigned OperandName) const;
849 const MachineOperand *getNamedOperand(const MachineInstr &MI, in getNamedOperand() function
851 return getNamedOperand(const_cast<MachineInstr &>(MI), OpName); in getNamedOperand()
H A DSIFixSGPRCopies.cpp364 TII->getNamedOperand(*MoveImm, AMDGPU::OpName::src0); in isSafeToFoldImmIntoCopy()
H A DSIInsertWaitcnts.cpp629 MachineOperand *MO = TII->getNamedOperand(Inst, AMDGPU::OpName::data); in updateByEvent()
1141 int Imm = TII->getNamedOperand(Inst, AMDGPU::OpName::tgt)->getImm(); in updateEventWaitcntAfter()
H A DSIFrameLowering.cpp695 int FI = TII->getNamedOperand(MI, AMDGPU::OpName::addr)->getIndex(); in processFunctionBeforeFrameFinalized()
H A DAMDGPUAsmPrinter.cpp762 = TII->getNamedOperand(MI, AMDGPU::OpName::callee); in analyzeResourceUsage()
H A DSIISelLowering.cpp2982 const MachineOperand *Idx = TII->getNamedOperand(MI, AMDGPU::OpName::idx); in loadM0FromVGPR()
3022 const MachineOperand *Idx = TII->getNamedOperand(MI, AMDGPU::OpName::idx); in setM0ToIndexFromSGPR()
3078 unsigned SrcReg = TII->getNamedOperand(MI, AMDGPU::OpName::src)->getReg(); in emitIndirectSrc()
3079 int Offset = TII->getNamedOperand(MI, AMDGPU::OpName::offset)->getImm(); in emitIndirectSrc()
3169 const MachineOperand *SrcVec = TII->getNamedOperand(MI, AMDGPU::OpName::src); in emitIndirectDst()
3170 const MachineOperand *Idx = TII->getNamedOperand(MI, AMDGPU::OpName::idx); in emitIndirectDst()
3171 const MachineOperand *Val = TII->getNamedOperand(MI, AMDGPU::OpName::val); in emitIndirectDst()
3172 int Offset = TII->getNamedOperand(MI, AMDGPU::OpName::offset)->getImm(); in emitIndirectDst()
/freebsd-12.1/contrib/llvm/tools/clang/lib/AST/
H A DStmt.cpp495 int GCCAsmStmt::getNamedOperand(StringRef SymbolicName) const { in getNamedOperand() function in GCCAsmStmt
661 int N = getNamedOperand(SymbolicName); in AnalyzeAsmString()
/freebsd-12.1/contrib/llvm/tools/clang/include/clang/AST/
H A DStmt.h2832 int getNamedOperand(StringRef SymbolicName) const;