| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 754 SDValue New = TLO.DAG.getNOT(dl, Op0, VT); in SimplifyDemandedBits()
2098 SDValue NotX = DAG.getNOT(SDLoc(X), X, OpVT); in simplifySetCCWithAnd()
3039 N0 = DAG.getNOT(dl, Temp, OpVT); in SimplifySetCC()
3048 Temp = DAG.getNOT(dl, N0, OpVT); in SimplifySetCC()
3055 Temp = DAG.getNOT(dl, N1, OpVT); in SimplifySetCC()
3062 Temp = DAG.getNOT(dl, N0, OpVT); in SimplifySetCC()
3069 Temp = DAG.getNOT(dl, N1, OpVT); in SimplifySetCC()
4658 Op = DAG.getNOT(dl, Op, VT); in expandCTLZ()
4703 ISD::AND, dl, VT, DAG.getNOT(dl, Op, VT), in expandCTTZ()
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| H A D | DAGCombiner.cpp | 6106 SDValue NotX = DAG.getNOT(DL, X, VT); in unfoldMaskedMerge()
6108 SDValue NotLHS = DAG.getNOT(DL, LHS, VT); in unfoldMaskedMerge()
6114 SDValue NotM = DAG.getNOT(DL, M, VT); in unfoldMaskedMerge()
6224 SDValue NotX = DAG.getNOT(SDLoc(X), X, VT); in visitXOR()
7289 SDValue NotCond = DAG.getNOT(DL, Cond, MVT::i1); in foldSelectOfConstants()
7296 SDValue NotCond = DAG.getNOT(DL, Cond, MVT::i1); in foldSelectOfConstants()
7381 SDValue NOTNode = DAG.getNOT(SDLoc(N0), N0, VT); in visitSELECT()
7387 SDValue NOTNode = DAG.getNOT(SDLoc(N0), N0, VT); in visitSELECT()
8593 SDValue NotX = DAG.getNOT(DL, X, VT); in foldExtendedSignBitTest()
18470 Shift = DAG.getNOT(DL, Shift, AType); in foldSelectCCToShiftAnd()
[all …]
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| H A D | SelectionDAG.cpp | 1140 SDValue SelectionDAG::getNOT(const SDLoc &DL, SDValue Val, EVT VT) { in getNOT() function in SelectionDAG
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| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 1488 DAG.getNOT(DL, Bit, ResTy)); in lowerMSABitClear()
2049 return DAG.getNOT(DL, Res, Res->getValueType(0)); in lowerINTRINSIC_WO_CHAIN()
2055 return DAG.getNOT(DL, Res, Res->getValueType(0)); in lowerINTRINSIC_WO_CHAIN()
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 798 SDValue getNOT(const SDLoc &DL, SDValue Val, EVT VT);
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1208 DstMask = DAG.getNOT(DL, DstMask, MVT::i32); in lowerPrivateTruncStore()
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| H A D | AMDGPUISelLowering.cpp | 2045 SDValue Not = DAG.getNOT(SL, Shr, MVT::i64); in LowerFTRUNC()
2167 K = DAG.getNode(ISD::AND, SL, MVT::i64, K, DAG.getNOT(SL, M, MVT::i64)); in LowerFROUND64()
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| H A D | SIISelLowering.cpp | 4379 DAG.getNOT(SL, BFM, IntVT), BCVec); in lowerINSERT_VECTOR_ELT()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 19570 Result = DAG.getNOT(dl, Result, VT); in LowerVSETCC()
19629 Result = DAG.getNOT(dl, Result, MVT::v4i32); in LowerVSETCC()
19652 Result = DAG.getNOT(dl, Result, MVT::v4i32); in LowerVSETCC()
19672 Result = DAG.getNOT(dl, Result, VT); in LowerVSETCC()
20064 Res = DAG.getNOT(DL, Res, Res.getValueType()); in LowerSELECT()
20185 return DAG.getNOT(DL, Res, Res.getValueType()); in LowerSELECT()
23563 DAG.getNOT(dl, Op.getOperand(1), VT)); in LowerADDSAT_SUBSAT()
33845 SDValue CondNew = DAG.getNOT(DL, Cond, CondVT); in combineVSelectWithAllOnesOrZeros()
33963 Cond = DAG.getNOT(DL, Cond, MVT::i1); in combineSelectOfTwoConstants()
39852 return DAG.getNOT(DL, LHS.getOperand(0), VT); in combineSetCC()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 5551 Merged = DAG.getNOT(dl, Merged, CmpVT); in LowerVSETCC()
5676 Result = DAG.getNOT(dl, Result, VT); in LowerVSETCC()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 7868 Cmp = DAG.getNOT(dl, Cmp, Cmp.getValueType()); in LowerVSETCC()
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