| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineFunctionInfo.cpp | 184 ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addPrivateSegmentBuffer() 191 ArgInfo.DispatchPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchPtr() 198 ArgInfo.QueuePtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addQueuePtr() 206 = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addKernargSegmentPtr() 213 ArgInfo.DispatchID = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchID() 220 ArgInfo.FlatScratchInit = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addFlatScratchInit() 227 ArgInfo.ImplicitBufferPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addImplicitBufferPtr()
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| H A D | R600ControlFlowFinalizer.cpp | 311 DstMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause() 320 SrcMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause()
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| H A D | SIRegisterInfo.cpp | 115 return getMatchingSuperReg(BaseReg, AMDGPU::sub0, &AMDGPU::SReg_128RegClass); in reservedPrivateSegmentBufferReg()
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| /freebsd-12.1/contrib/llvm/lib/MC/ |
| H A D | MCRegisterInfo.cpp | 24 unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg() function in MCRegisterInfo
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 2499 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::dsub, in copyPhysReg() 2501 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::dsub, in copyPhysReg() 2516 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::ssub, in copyPhysReg() 2518 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::ssub, in copyPhysReg() 2533 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub, in copyPhysReg() 2535 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::hsub, in copyPhysReg() 2541 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub, in copyPhysReg() 2543 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::hsub, in copyPhysReg() 2554 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::bsub, in copyPhysReg() 2556 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::bsub, in copyPhysReg() [all …]
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| H A D | AArch64LoadStoreOptimizer.cpp | 940 ? TRI->getMatchingSuperReg(LdRt, AArch64::sub_32, in promoteLoadFromStore()
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 541 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg() function 543 return MCRegisterInfo::getMatchingSuperReg(Reg, SubIdx, RC->MC); in getMatchingSuperReg()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | CalcSpillWeights.cpp | 79 return tri.getMatchingSuperReg(CopiedPReg, sub, rc); in copyHint()
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| H A D | TwoAddressInstructionPass.cpp | 1566 assert(TRI->getMatchingSuperReg(RegA, SubRegB, MRI->getRegClass(RegB)) in processTiedPairs()
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| /freebsd-12.1/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZShortenInst.cpp | 88 TRI->getMatchingSuperReg(Reg, thisSubRegIdx, &SystemZ::GR64BitRegClass); in shortenIIF()
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| H A D | SystemZInstrInfo.cpp | 808 RI.getMatchingSuperReg(RI.getSubReg(SrcReg, SystemZ::subreg_h64), in copyPhysReg() 811 RI.getMatchingSuperReg(RI.getSubReg(SrcReg, SystemZ::subreg_l64), in copyPhysReg() 822 RI.getMatchingSuperReg(RI.getSubReg(DestReg, SystemZ::subreg_h64), in copyPhysReg() 825 RI.getMatchingSuperReg(RI.getSubReg(DestReg, SystemZ::subreg_l64), in copyPhysReg()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1233 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills() 1252 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills() 1267 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills() 1365 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores() 1383 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores() 1396 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
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| H A D | A15SDOptimizer.cpp | 146 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, in getDPRLaneFromSPR()
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| H A D | ARMBaseInstrInfo.cpp | 1494 unsigned DstRegD = TRI->getMatchingSuperReg(DstRegS, ARM::ssub_0, in expandPostRAPseudo() 1496 unsigned SrcRegD = TRI->getMatchingSuperReg(SrcRegS, ARM::ssub_0, in expandPostRAPseudo() 4639 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_0, &ARM::DPRRegClass); in getCorrespondingDRegAndLane() 4646 DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, &ARM::DPRRegClass); in getCorrespondingDRegAndLane() 4950 unsigned DReg = TRI->getMatchingSuperReg(Reg, ARM::ssub_0, in getPartialRegUpdateClearance()
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| H A D | ARMExpandPseudoInsts.cpp | 496 unsigned DstRegPair = TRI->getMatchingSuperReg(SubReg, ARM::dsub_0, in ExpandVLD()
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| /freebsd-12.1/contrib/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 351 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
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| /freebsd-12.1/contrib/llvm/lib/Target/AVR/AsmParser/ |
| H A D | AVRAsmParser.cpp | 78 return MRI->getMatchingSuperReg(Reg, From, Class); in toDREG()
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCopyToCombine.cpp | 601 unsigned DoubleRegDest = TRI->getMatchingSuperReg(LoRegDef, SubLo, SuperRC); in combine()
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 352 auto NewVdata = MRI.getMatchingSuperReg(Vdata0, AMDGPU::sub0, in convertMIMGInst()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 3044 DestReg = TRI->getMatchingSuperReg(DestReg, X86::sub_xmm, in copyPhysReg() 3046 SrcReg = TRI->getMatchingSuperReg(SrcReg, X86::sub_xmm, in copyPhysReg() 3059 DestReg = TRI->getMatchingSuperReg(DestReg, X86::sub_ymm, in copyPhysReg() 3061 SrcReg = TRI->getMatchingSuperReg(SrcReg, X86::sub_ymm, in copyPhysReg() 4101 DestReg = TRI->getMatchingSuperReg(DestReg, SubIdx, &X86::VR512RegClass); in expandNOVLXLoad() 4124 SrcReg = TRI->getMatchingSuperReg(SrcReg, SubIdx, &X86::VR512RegClass); in expandNOVLXStore() 4179 TRI->getMatchingSuperReg(SrcReg, X86::sub_xmm, &X86::VR512RegClass); in expandPostRAPseudo()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/InstPrinter/ |
| H A D | ARMInstPrinter.cpp | 260 NewReg = MCOperand::createReg(MRI.getMatchingSuperReg( in printInst()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/InstPrinter/ |
| H A D | AArch64InstPrinter.cpp | 1281 Reg = MRI.getMatchingSuperReg(Reg, AArch64::dsub, &FPR128RC); in printVectorList()
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 902 TRI->getMatchingSuperReg(DestReg, PPC::sub_64, &PPC::VSRCRegClass); in copyPhysReg() 911 TRI->getMatchingSuperReg(SrcReg, PPC::sub_64, &PPC::VSRCRegClass); in copyPhysReg()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 3979 Reg = MRI->getMatchingSuperReg(Reg, ARM::dsub_0, in parseVectorList() 3984 Reg = MRI->getMatchingSuperReg(Reg, ARM::dsub_0, in parseVectorList() 4160 FirstReg = MRI->getMatchingSuperReg(FirstReg, ARM::dsub_0, RC); in parseVectorList() 4172 FirstReg = MRI->getMatchingSuperReg(FirstReg, ARM::dsub_0, RC); in parseVectorList() 6279 unsigned NewReg = MRI->getMatchingSuperReg(Reg1, ARM::gsub_0, in ParseInstruction()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 5651 Pair = RI->getMatchingSuperReg(FirstReg, AArch64::sube64, in tryParseGPRSeqPair() 5654 Pair = RI->getMatchingSuperReg(FirstReg, AArch64::sube32, in tryParseGPRSeqPair()
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