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Searched refs:getMachineOpValue (Results 1 – 19 of 19) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZMCCodeEmitter.cpp60 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
172 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SystemZMCCodeEmitter
186 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDAddr12Encoding()
187 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr12Encoding()
196 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDAddr20Encoding()
206 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDXAddr12Encoding()
217 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDXAddr20Encoding()
229 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDLAddr12Len4Encoding()
240 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDLAddr12Len8Encoding()
251 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDRAddr12Encoding()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCMCCodeEmitter.cpp48 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding()
60 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getCondBrEncoding()
73 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsDirectBrEncoding()
86 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsCondBrEncoding()
98 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getImm16Encoding()
116 return (getMachineOpValue(MI, MO, Fixups, STI) & 0xFFFF) | RegBits; in getMemRIEncoding()
174 uint32_t Imm = getMachineOpValue(MI, MO, Fixups, STI) >> 3; in getSPE8DisEncoding()
189 uint32_t Imm = getMachineOpValue(MI, MO, Fixups, STI) >> 2; in getSPE4DisEncoding()
204 uint32_t Imm = getMachineOpValue(MI, MO, Fixups, STI) >> 1; in getSPE2DisEncoding()
212 if (MO.isReg()) return getMachineOpValue(MI, MO, Fixups, STI); in getTLSRegEncoding()
[all …]
H A DPPCMCCodeEmitter.h84 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
/freebsd-12.1/contrib/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsMCCodeEmitter.cpp538 unsigned Res = getMachineOpValue(MI, MO, Fixups, STI); in getUImm5Lsl2Encoding()
744 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in MipsMCCodeEmitter
785 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4()
787 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4()
799 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl1()
801 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl1()
813 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl2()
815 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl2()
830 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMSPImm5Lsl2()
845 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMGPImm7Lsl2()
[all …]
H A DMipsMCCodeEmitter.h181 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
/freebsd-12.1/contrib/llvm/lib/Target/Sparc/MCTargetDesc/
H A DSparcMCCodeEmitter.cpp69 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
115 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI); in encodeInstruction()
124 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SparcMCCodeEmitter
155 return getMachineOpValue(MI, MO, Fixups, STI); in getCallTargetOpValue()
190 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
203 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchPredTargetOpValue()
216 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchOnRegTargetOpValue()
/freebsd-12.1/contrib/llvm/lib/Target/Lanai/MCTargetDesc/
H A DLanaiMCCodeEmitter.cpp58 unsigned getMachineOpValue(const MCInst &Inst, const MCOperand &MCOp,
110 unsigned LanaiMCCodeEmitter::getMachineOpValue( in getMachineOpValue() function in llvm::LanaiMCCodeEmitter
213 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getRiMemoryOpValue()
284 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getSplsOpValue()
294 return getMachineOpValue(Inst, MCOp, Fixups, SubtargetInfo); in getBranchTargetOpValue()
/freebsd-12.1/contrib/llvm/lib/Target/BPF/MCTargetDesc/
H A DBPFMCCodeEmitter.cpp54 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
86 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in BPFMCCodeEmitter
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DSIMCCodeEmitter.cpp63 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
325 return getMachineOpValue(MI, MO, Fixups, STI); in getSOPPBrEncoding()
396 uint64_t SIMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in SIMCCodeEmitter
H A DR600MCCodeEmitter.cpp54 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
171 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in R600MCCodeEmitter
H A DAMDGPUMCCodeEmitter.h43 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function
/freebsd-12.1/contrib/llvm/lib/Target/MSP430/MCTargetDesc/
H A DMSP430MCCodeEmitter.cpp54 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
102 unsigned MSP430MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in llvm::MSP430MCCodeEmitter
/freebsd-12.1/contrib/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMCCodeEmitter.cpp68 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
161 RISCVMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in RISCVMCCodeEmitter
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCCodeEmitter.h69 unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO,
H A DHexagonMCCodeEmitter.cpp721 HexagonMCCodeEmitter::getMachineOpValue(MCInst const &MI, MCOperand const &MO, in getMachineOpValue() function in HexagonMCCodeEmitter
/freebsd-12.1/contrib/llvm/lib/Target/AVR/MCTargetDesc/
H A DAVRMCCodeEmitter.h95 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
H A DAVRMCCodeEmitter.cpp250 unsigned AVRMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in llvm::AVRMCCodeEmitter
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCCodeEmitter.cpp63 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
201 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in AArch64MCCodeEmitter
/freebsd-12.1/contrib/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp87 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
533 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in ARMMCCodeEmitter