| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | TargetSchedule.cpp | 206 unsigned InstrLatency = TII->getInstrLatency(&InstrItins, *DefMI); in computeOperandLatency()
280 return TII->getInstrLatency(&InstrItins, *MI); in computeInstrLatency()
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| H A D | TargetInstrInfo.cpp | 1045 int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() function in TargetInstrInfo
1091 unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() function in TargetInstrInfo
1133 return getInstrLatency(ItinData, DefMI); in computeDefOperandLatency()
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| H A D | TwoAddressInstructionPass.cpp | 905 if (TII->getInstrLatency(InstrItins, *MI) > 1) in rescheduleMIBelowKill()
1038 if (TII->getInstrLatency(InstrItins, DefMI) > (Dist - DefDist)) in isDefTooClose()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 378 unsigned getInstrLatency(const InstrItineraryData *ItinData,
382 int getInstrLatency(const InstrItineraryData *ItinData,
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| H A D | ARMBaseInstrInfo.cpp | 4096 unsigned Latency = getInstrLatency(ItinData, DefMI); in getOperandLatencyImpl()
4416 unsigned ARMBaseInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() function in ARMBaseInstrInfo
4431 Latency += getInstrLatency(ItinData, *I, PredCost); in getInstrLatency()
4467 int ARMBaseInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() function in ARMBaseInstrInfo
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | R600InstrInfo.h | 209 unsigned int getInstrLatency(const InstrItineraryData *ItinData,
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| H A D | R600InstrInfo.cpp | 1010 unsigned int R600InstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() function in R600InstrInfo
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1367 virtual unsigned getInstrLatency(const InstrItineraryData *ItinData,
1373 virtual int getInstrLatency(const InstrItineraryData *ItinData,
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 213 unsigned getInstrLatency(const InstrItineraryData *ItinData,
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| H A D | PPCInstrInfo.cpp | 147 unsigned PPCInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() function in PPCInstrInfo
151 return PPCGenInstrInfo::getInstrLatency(ItinData, MI, PredCost); in getInstrLatency()
203 Latency = getInstrLatency(ItinData, DefMI); in getOperandLatency()
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.h | 286 unsigned getInstrLatency(const InstrItineraryData *ItinData,
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| H A D | HexagonInstrInfo.cpp | 1809 unsigned HexagonInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() function in HexagonInstrInfo
4035 return getInstrLatency(ItinData, MI); in getInstrTimingClassLatency()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.cpp | 621 SU->Latency += TII->getInstrLatency(InstrItins, N); in computeLatency()
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