| /freebsd-12.1/bin/pax/ |
| H A D | options.c | 101 FSUB fsub[] = { variable 371 if ((frmt = (FSUB *)bsearch((void *)&tmp, (void *)fsub, in pax_options() 378 for (i = 0; i < (sizeof(fsub)/sizeof(FSUB)); ++i) in pax_options() 379 (void)fprintf(stderr, " %s", fsub[i].name); in pax_options() 550 frmt = &(fsub[DEFLT]); in pax_options() 831 frmt = &(fsub[tar_Oflag ? F_OTAR : F_TAR]); in tar_options() 1055 frmt = &(fsub[F_ACPIO]); in cpio_options() 1094 frmt = &(fsub[F_CPIO]); in cpio_options() 1198 for (i = 0; i < (sizeof(fsub)/sizeof(FSUB)); ++i) in cpio_options() 1199 (void)fprintf(stderr, " %s", fsub[i].name); in cpio_options() [all …]
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| H A D | pax.h | 74 typedef struct fsub FSUB; 88 struct fsub { struct
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| H A D | ar_subs.c | 1139 if (fsub[ford[i]].hsz < minhd) in get_arc() 1140 minhd = fsub[ford[i]].hsz; in get_arc() 1190 if ((*fsub[ford[i]].id)(hdbuf, hdsz) < 0) in get_arc() 1192 frmt = &(fsub[ford[i]]); in get_arc()
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| H A D | extern.h | 185 extern FSUB fsub[];
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| /freebsd-12.1/lib/libc/arm/aeabi/ |
| H A D | aeabi_vfp_float.S | 184 AEABI_ENTRY(fsub) 189 AEABI_END(fsub)
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| H A D | aeabi_float.c | 77 float32 AEABI_FUNC2(fsub, float32, float32_sub) in AEABI_FUNC2()
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| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsInstrFPU.td | 209 [(set RC:$fd, (fsub fpimm0, (OpNode (fmul RC:$fs, RC:$ft), RC:$fr)))], 644 def FSUB_S : MMRel, ADDS_FT<"sub.s", FGR32Opnd, II_SUB_S, 0, fsub>, 646 defm FSUB : ADDS_M<"sub.d", II_SUB_D, 0, fsub>, ADDS_FM<0x01, 17>, 653 def MSUB_S : MMRel, MADDS_FT<"msub.s", FGR32Opnd, II_MSUB_S, fsub>, 658 def MSUB_D32 : MMRel, MADDS_FT<"msub.d", AFGR64Opnd, II_MSUB_D, fsub>, 664 def MSUB_D64 : MADDS_FT<"msub.d", FGR64Opnd, II_MSUB_D, fsub>, 672 def NMSUB_S : MMRel, NMADDS_FT<"nmsub.s", FGR32Opnd, II_NMSUB_S, fsub>, 677 def NMSUB_D32 : MMRel, NMADDS_FT<"nmsub.d", AFGR64Opnd, II_NMSUB_D, fsub>, 683 def NMSUB_D64 : NMADDS_FT<"nmsub.d", FGR64Opnd, II_NMSUB_D, fsub>, 946 def : MipsPat<(fneg (fsub (fmul RC:$fs, RC:$ft), RC:$fr)),
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| H A D | MicroMipsInstrFPU.td | 32 def FSUB_S_MM : MMRel, ADDS_FT<"sub.s", FGR32Opnd, II_SUB_S, 0, fsub>, 41 defm FSUB : ADDS_MMM<"sub.d", II_SUB_D, 0, fsub>,
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| H A D | MipsMSAInstrInfo.td | 2156 class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>; 2157 class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>; 3163 def : MipsPat<(fsub MSA128WOpnd:$wd, (fmul MSA128WOpnd:$ws, MSA128WOpnd:$wt)), 3166 def : MipsPat<(fsub MSA128DOpnd:$wd, (fmul MSA128DOpnd:$ws, MSA128DOpnd:$wt)),
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86InstrFPStack.td | 238 defm SUB : FPBinary_rr<fsub>; 246 defm SUB : FPBinary<fsub, MRM4m, "sub">; 247 defm SUBR: FPBinary<fsub ,MRM5m, "subr", 0>; 268 // of some of the 'reverse' forms of the fsub and fdiv instructions. As such, 275 def SUB_FrST0 : FPrST0Inst <MRM5r, "fsub{r}\t{%st, $op|$op, st}">; 276 def SUB_FPrST0 : FPrST0PInst<MRM5r, "fsub{r}p\t{%st, $op|$op, st}">; 277 def SUB_FST0r : FPST0rInst <MRM4r, "fsub\t{$op, %st|st, $op}">; 278 def SUBR_FrST0 : FPrST0Inst <MRM4r, "fsub{|r}\t{%st, $op|$op, st}">; 279 def SUBR_FPrST0 : FPrST0PInst<MRM4r, "fsub{|r}p\t{%st, $op|$op, st}">;
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| H A D | X86InstrInfo.td | 3213 def : InstAlias<"fsub{|r}p", (SUBR_FPrST0 ST1), 0>; 3214 def : InstAlias<"fsub{r|}p", (SUB_FPrST0 ST1), 0>; 3229 // Handle fmul/fadd/fsub/fdiv instructions with explicitly written st(0) op. 3242 defm : FpUnaryAlias<"fsub", SUB_FST0r, 0>; 3243 defm : FpUnaryAlias<"fsub{|r}p", SUBR_FPrST0, 0>; 3245 defm : FpUnaryAlias<"fsub{r|}p", SUB_FPrST0, 0>; 3263 def : InstAlias<"fsub{|r}p\t{$op, %st|st, $op}", (SUBR_FPrST0 RSTi:$op), 0>; 3264 def : InstAlias<"fsub{r|}p\t{$op, %st|st, $op}", (SUB_FPrST0 RSTi:$op), 0>;
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| /freebsd-12.1/contrib/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoD.td | 93 def FSUB_D : FPALUD_rr_frm<0b0000101, "fsub.d">; 94 def : FPALUDDynFrmAlias<FSUB_D, "fsub.d">; 221 def : PatFpr64Fpr64DynFrm<fsub, FSUB_D>;
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| H A D | RISCVInstrInfoF.td | 114 def FSUB_S : FPALUS_rr_frm<0b0000100, "fsub.s">; 115 def : FPALUSDynFrmAlias<FSUB_S, "fsub.s">; 261 def : PatFpr32Fpr32DynFrm<fsub, FSUB_S>;
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| /freebsd-12.1/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrFP.td | 428 def SEBR : BinaryRRE<"sebr", 0xB30B, fsub, FP32, FP32>; 429 def SDBR : BinaryRRE<"sdbr", 0xB31B, fsub, FP64, FP64>; 430 def SXBR : BinaryRRE<"sxbr", 0xB34B, fsub, FP128, FP128>; 432 def SEB : BinaryRXE<"seb", 0xED0B, fsub, FP32, load, 4>; 433 def SDB : BinaryRXE<"sdb", 0xED1B, fsub, FP64, load, 8>;
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| H A D | SystemZInstrVector.td | 1178 def VFSDB : BinaryVRRc<"vfsdb", 0xE7E2, fsub, v128db, v128db, 3, 0>; 1179 def WFSDB : BinaryVRRc<"wfsdb", 0xE7E2, fsub, v64db, v64db, 3, 8>; 1181 def VFSSB : BinaryVRRc<"vfssb", 0xE7E2, fsub, v128sb, v128sb, 2, 0>; 1182 def WFSSB : BinaryVRRc<"wfssb", 0xE7E2, fsub, v32sb, v32sb, 2, 8>; 1183 def WFSXB : BinaryVRRc<"wfsxb", 0xE7E2, fsub, v128xb, v128xb, 4, 8>;
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| /freebsd-12.1/sys/powerpc/fpu/ |
| H A D | fpu_emu.c | 131 FPU_EMU_EVCNT_DECL(fsub); 631 FPU_EMU_EVCNT_INCR(fsub); in fpu_execute()
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| /freebsd-12.1/contrib/llvm/include/llvm/Target/GlobalISel/ |
| H A D | SelectionDAGCompat.td | 72 def : GINodeEquiv<G_FSUB, fsub>;
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| /freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrFloat.td | 50 defm SUB : BinaryFP<fsub, "sub ", 0x93, 0xa1>;
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64SVEInstrInfo.td | 120 defm FSUB_ZPmI : sve_fp_2op_i_p_zds<0b001, "fsub", sve_fpimm_half_one>; 129 defm FSUB_ZPmZ : sve_fp_2op_p_zds<0b0001, "fsub">; 143 defm FSUB_ZZZ : sve_fp_3op_u_zd<0b001, "fsub">;
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | VOP2Instructions.td | 403 defm V_SUB_F32 : VOP2Inst <"v_sub_f32", VOP_F32_F32_F32, fsub>; 564 defm V_SUB_F16 : VOP2Inst <"v_sub_f16", VOP_F16_F16_F16, fsub>;
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| /freebsd-12.1/contrib/llvm/lib/AsmParser/ |
| H A D | LLLexer.cpp | 830 INSTKEYWORD(sub, Sub); INSTKEYWORD(fsub, FSub); in LexIdentifier()
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrSPE.td | 236 [(set f64:$RT, (fsub f64:$RA, f64:$RB))]>; 323 [(set f32:$RT, (fsub f32:$RA, f32:$RB))]>;
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| H A D | README_P9.txt | 193 (set f128:$vT, (fsub f128:$vA, f128:$vB)) // xssubqp
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| /freebsd-12.1/contrib/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrInfo.td | 1229 [(set f32:$rd, (fsub f32:$rs1, f32:$rs2))], 1234 [(set f64:$rd, (fsub f64:$rs1, f64:$rs2))], 1239 [(set f128:$rd, (fsub f128:$rs1, f128:$rs2))]>,
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMInstrNEON.td | 4640 v4f16, fmul, fsub>, 4643 v8f16, fmul, fsub>, 4742 v4f16, fmul, fsub>, 4745 v8f16, fmul, fsub>, 4957 v2f32, v2f32, fsub, 0>; 4959 v4f32, v4f32, fsub, 0>; 4961 v4f16, v4f16, fsub, 0>, 4964 v8f16, v8f16, fsub, 0>, 7084 def : N3VSPat<fsub, VSUBfd>; 7088 def : N3VSMulOpPat<fmul, fsub, VMLSfd>, [all …]
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