| /freebsd-12.1/lib/libc/sparc64/fpu/ |
| H A D | fpu_implode.c | 67 static int fpround(struct fpemu *, struct fpn *); 83 fpround(struct fpemu *fe, struct fpn *fp) in fpround() function 349 if (fpround(fe, fp) && fp->fp_mant[3] == SNG_EXP(1)) { 364 if (fpround(fe, fp) && fp->fp_mant[3] == SNG_EXP(2)) 412 if (fpround(fe, fp) && fp->fp_mant[2] == DBL_EXP(1)) { 424 if (fpround(fe, fp) && fp->fp_mant[2] == DBL_EXP(2)) 474 if (fpround(fe, fp) && fp->fp_mant[0] == EXT_EXP(1)) { 486 if (fpround(fe, fp) && fp->fp_mant[0] == EXT_EXP(2))
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | VOP3PInstructions.td | 78 (f16 (fpround (fma_like (f32 (VOP3PMadMixMods f16:$src0, i32:$src0_modifiers)), 92 …(build_vector f16:$elt0, (fpround (fma_like (f32 (VOP3PMadMixMods f16:$src0, i32:$src0_modifiers)), 105 (AMDGPUclamp (fpround (fma_like (f32 (VOP3PMadMixMods f16:$src0, i32:$src0_modifiers)), 117 (fpround (fma_like (f32 (VOP3PMadMixMods f16:$lo_src0, i32:$lo_src0_modifiers)), 120 (fpround (fma_like (f32 (VOP3PMadMixMods f16:$hi_src0, i32:$hi_src0_modifiers)),
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| H A D | VOP1Instructions.td | 183 defm V_CVT_F16_F32 : VOP1Inst <"v_cvt_f16_f32", VOP_F16_F32, fpround>; 189 defm V_CVT_F32_F64 : VOP1Inst <"v_cvt_f32_f64", VOP_F32_F64, fpround>;
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| /freebsd-12.1/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrFP.td | 96 def : Pat<(fcopysign FP32:$src1, (f32 (fpround (f128 FP128:$src2)))), 99 def : Pat<(fcopysign FP32:$src1, (f32 (fpround (f128 VR128:$src2)))), 109 def : Pat<(fcopysign FP64:$src1, (f64 (fpround (f128 FP128:$src2)))), 112 def : Pat<(fcopysign FP64:$src1, (f64 (fpround (f128 VR128:$src2)))), 177 def LEDBR : UnaryRRE<"ledbr", 0xB344, fpround, FP32, FP64>; 189 def : Pat<(f32 (fpround FP128:$src)), 191 def : Pat<(f64 (fpround FP128:$src)),
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| H A D | SystemZInstrVector.td | 1018 def : FPConversion<WLEDB, fpround, v32sb, v64db, 0, 0>; 1026 def : FPConversion<WFLRX, fpround, v64db, v128xb, 0, 0>; 1027 def : Pat<(f32 (fpround (f128 VR128:$src))),
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| /freebsd-12.1/contrib/llvm/include/llvm/Target/GlobalISel/ |
| H A D | SelectionDAGCompat.td | 66 def : GINodeEquiv<G_FPTRUNC, fpround>;
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| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MicroMipsInstrFPU.td | 417 def : MipsPat<(f32 (fpround FGR64Opnd:$src)), 421 def : MipsPat<(f32 (fpround AFGR64Opnd:$src)),
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| H A D | MipsInstrFPU.td | 911 def : MipsPat<(f32 (fpround AFGR64Opnd:$src)), 936 def : MipsPat<(f32 (fpround FGR64Opnd:$src)),
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| H A D | MipsMSAInstrInfo.td | 3788 (f16 (fpround FGR32Opnd:$fs)))]> { 3802 (f16 (fpround FGR64Opnd:$fs)))]> {
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| /freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrConv.td | 213 [(set F32:$dst, (fpround F64:$src))],
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86InstrFPStack.td | 737 def : Pat<(f32 (fpround RFP64:$src)), (COPY_TO_REGCLASS RFP64:$src, RFP32)>, 739 def : Pat<(f32 (fpround RFP80:$src)), (COPY_TO_REGCLASS RFP80:$src, RFP32)>, 741 def : Pat<(f64 (fpround RFP80:$src)), (COPY_TO_REGCLASS RFP80:$src, RFP64)>,
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| H A D | X86InstrSSE.td | 1199 def : Pat<(f32 (fpround FR64:$src)), 1205 [(set FR32:$dst, (fpround FR64:$src))]>, 1209 [(set FR32:$dst, (fpround (loadf64 addr:$src)))]>, 1328 (f32 (fpround (f64 (extractelt VR128:$src, (iPTR 0))))))))), 1382 (f32 (fpround (f64 (extractelt VR128:$src, (iPTR 0))))))))), 1773 [(set VR128:$dst, (fpround VR256:$src))]>, 1777 [(set VR128:$dst, (fpround (loadv4f64 addr:$src)))]>, 1799 // Match fpround and fpextend for 128/256-bit conversions 1809 // Match fpround and fpextend for 128 conversions
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| H A D | X86InstrAVX512.td | 7978 def : Pat<(f32 (fpround FR64X:$src)), 7985 (f32 (fpround (f64 (extractelt VR128X:$src, (iPTR 0))))))))), 8096 defm Z : avx512_vcvt_fp<opc, OpcodeStr, v8f32x_info, v8f64_info, fpround, sched.ZMM>, 8104 defm Z256 : avx512_vcvt_fp<opc, OpcodeStr, v4f32x_info, v4f64x_info, fpround, 8806 def : Pat<(v8f32 (fpround (loadv8f64 addr:$src))),
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| /freebsd-12.1/contrib/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoD.td | 212 def : Pat<(fpround FPR64:$rs1), (FCVT_S_D FPR64:$rs1, 0b111)>;
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| /freebsd-12.1/contrib/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXInstrInfo.td | 2953 // fpround f32 -> f16 2954 def : Pat<(f16 (fpround Float32Regs:$a)), 2957 // fpround f64 -> f16 2958 def : Pat<(f16 (fpround Float64Regs:$a)), 2961 // fpround f64 -> f32 2962 def : Pat<(f32 (fpround Float64Regs:$a)), 2964 def : Pat<(f32 (fpround Float64Regs:$a)),
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrVSX.td | 1319 def : Pat<(f32 (fpround (f64 (extloadf32 xoaddr:$src)))), 3289 def : Pat<(f32 (fpround (f64 (extloadf32 ixaddr:$src)))), 3547 def : Pat<(f64 (fpround f128:$src)), (f64 (XSCVQPDP $src))>; 3548 def : Pat<(f32 (fpround f128:$src)), (f32 (XSRSP (XSCVQPDPO $src)))>; 3593 dag A0 = (f32 (fpround (f64 (extractelt v2f64:$A, 0)))); 3594 dag A1 = (f32 (fpround (f64 (extractelt v2f64:$A, 1)))); 3595 dag B0 = (f32 (fpround (f64 (extractelt v2f64:$B, 0)))); 3596 dag B1 = (f32 (fpround (f64 (extractelt v2f64:$B, 1))));
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| H A D | PPCInstrQPX.td | 91 def fround_inexact : PatFrag<(ops node:$val), (fpround node:$val), [{ 95 def fround_exact : PatFrag<(ops node:$val), (fpround node:$val), [{
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| H A D | PPCInstrSPE.td | 258 [(set f32:$RT, (fpround f64:$RB))]>;
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| H A D | PPCInstrInfo.td | 2357 [(set f32:$frD, (fpround f64:$frB))]>;
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| /freebsd-12.1/contrib/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrInfo.td | 1153 [(set f32:$rd, (fpround f64:$rs2))], 1163 [(set f32:$rd, (fpround f128:$rs2))]>, 1168 [(set f64:$rd, (fpround f128:$rs2))]>,
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMInstrVFP.td | 657 [(set SPR:$Sd, (fpround DPR:$Dm))]>, 696 def : FullFP16Pat<(f16 (fpround SPR:$Sm)), 750 def : FullFP16Pat<(f16 (fpround DPR:$Dm)),
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| /freebsd-12.1/contrib/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 447 def fpround : SDNode<"ISD::FP_ROUND" , SDTFPRoundOp>;
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.td | 3345 def : Pat<(v2f32 (fpround (v2f64 V128:$Rn))), (FCVTNv2i32 V128:$Rn)>; 3346 def : Pat<(v4f16 (fpround (v4f32 V128:$Rn))), (FCVTNv4i16 V128:$Rn)>; 3347 def : Pat<(concat_vectors V64:$Rd, (v2f32 (fpround (v2f64 V128:$Rn)))),
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| H A D | AArch64InstrFormats.td | 4521 [(set FPR16:$Rd, (fpround FPR64:$Rn))]>; 4525 [(set FPR32:$Rd, (fpround FPR64:$Rn))]>; 4541 [(set FPR16:$Rd, (fpround FPR32:$Rn))]>;
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPatterns.td | 379 def: OpR_R_pat<F2_conv_df2sf, pf1<fpround>, f32, F64>;
|