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Searched refs:fcc (Results 1 – 25 of 26) sorted by relevance

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/freebsd-12.1/lib/libc/sparc64/fpu/
H A Dfpu_qp.c94 #define FCC_EQ(fcc) ((fcc) == FSR_CC_EQ) argument
95 #define FCC_GE(fcc) ((fcc) == FSR_CC_EQ || (fcc) == FSR_CC_GT) argument
96 #define FCC_GT(fcc) ((fcc) == FSR_CC_GT) argument
97 #define FCC_LE(fcc) ((fcc) == FSR_CC_EQ || (fcc) == FSR_CC_LT) argument
98 #define FCC_LT(fcc) ((fcc) == FSR_CC_LT) argument
99 #define FCC_NE(fcc) ((fcc) != FSR_CC_EQ) argument
100 #define FCC_ID(fcc) (fcc) argument
H A Dfpu_compare.c95 __fpu_compare(struct fpemu *fe, int cmpe, int fcc) in __fpu_compare() argument
177 fe->fe_fsr = (fe->fe_fsr & fcc_nmask[fcc]) | in __fpu_compare()
178 ((u_long)cc << fcc_shift[fcc]); in __fpu_compare()
H A Dfpu.c231 u_int32_t insn, int fcc) in __fpu_ccmov() argument
234 if (IF_F4_COND(insn) == fcc) in __fpu_ccmov()
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsInstrFormats.td104 bit hasFCCRegOperand = 0; // Instruction uses $fcc<X> register and is
821 bits<3> fcc;
828 let Inst{20-18} = fcc;
837 bits<3> fcc;
846 let Inst{10-8} = fcc;
873 bits<3> fcc;
879 let Inst{20-18} = fcc;
890 bits<3> fcc;
896 let Inst{20-18} = fcc;
H A DMipsCondMov.td38 InstSE<(outs RC:$rd), (ins RC:$rs, FCCRegsOpnd:$fcc, RC:$F),
39 !strconcat(opstr, "\t$rd, $rs, $fcc"),
40 [(set RC:$rd, (OpNode RC:$rs, FCCRegsOpnd:$fcc, RC:$F))],
48 InstSE<(outs RC:$fd), (ins RC:$fs, FCCRegsOpnd:$fcc, RC:$F),
49 !strconcat(opstr, "\t$fd, $fs, $fcc"),
50 [(set RC:$fd, (OpNode RC:$fs, FCCRegsOpnd:$fcc, RC:$F))],
H A DMicroMipsInstrFormats.td454 bits<3> fcc;
461 let Inst{15-13} = fcc;
782 bits<3> fcc;
790 let Inst{15-13} = fcc;
802 bits<3> fcc;
809 let Inst{20-18} = fcc; // cc
847 bits<3> fcc;
853 let Inst{15-13} = fcc; //cc
H A DMipsInstrFPU.td232 InstSE<(outs), (ins FCCRegsOpnd:$fcc, opnd:$offset),
233 !strconcat(opstr, "\t$fcc, $offset"),
244 InstSE<(outs), (ins FCCRegsOpnd:$fcc, opnd:$offset),
245 !strconcat(opstr, "\t$fcc, $offset"), [], Itin,
272 InstSE<(outs FCCRegsOpnd:$fcc), (ins RC:$fs, RC:$ft),
711 // fcc register set is used directly.
712 bits<3> fcc = 0;
718 // fcc register set is used directly.
719 bits<3> fcc = 0;
727 // fcc register set is used directly.
[all …]
H A DMicroMipsInstrFPU.td60 // fcc register set is used directly.
61 bits<3> fcc = 0;
68 // fcc register set is used directly.
69 bits<3> fcc = 0;
H A DMipsRegisterInfo.td202 def FCC#I : MipsReg<#I, "fcc"#I>;
/freebsd-12.1/contrib/gcclibs/libcpp/
H A Ducnid.tab33 1f5d 1f5f-1f7d 1f80-1fb4 1fb6-1fbc 1fc2-1fc4 1fc6-1fcc 1fd0-1fd3
134 1f5d 1f5f-1f7d 1f80-1fb4 1fb6-1fbc 1fc2-1fc4 1fc6-1fcc 1fd0-1fd3
/freebsd-12.1/contrib/llvm/lib/Target/Sparc/
H A DSparcInstrAliases.td46 // mov<cond> %fcc[0-3], rs2, rd
50 // mov<cond> %fcc[0-3], simm11, rd
54 // fmovs<cond> %fcc[0-3], $rs2, $rd
58 // fmovd<cond> %fcc[0-3], $rs2, $rd
/freebsd-12.1/crypto/heimdal/
H A DChangeLog.20041107 functions: address list, config file, use admin kdc, fcc version
1224 [libdefaults]fcc-mit-ticketflags=boolean
1227 [libdefaults]fcc-mit-ticketflags=boolean to decide what format to
1228 write the fcc in. Default to mit version (aka heimdal 0.7)
H A DChangeLog.2005151 to return NULL when its not found, and fcc when the name starts
522 fcc-mit-ticketflags.
526 * lib/krb5/krb5_keytab.3: Document fcc-mit-ticketflags in
/freebsd-12.1/usr.sbin/bsnmpd/modules/snmp_wlan/
H A Dwlan_tree.def49 1 fcc
H A DBEGEMOT-WIRELESS-MIB.txt173 fcc(1),
/freebsd-12.1/contrib/binutils/opcodes/
H A DChangeLog-2006530 * mips-dis.c (print_insn_args): Print $fcc only for FP
/freebsd-12.1/contrib/gcc/config/sparc/
H A Dsparc.md133 (define_attr "branch_type" "none,icc,fcc,reg"
187 (eq_attr "branch_type" "fcc")
1612 (set_attr "branch_type" "fcc")])
1629 (set_attr "branch_type" "fcc")])
1646 (set_attr "branch_type" "fcc")])
1663 (set_attr "branch_type" "fcc")])
/freebsd-12.1/contrib/gcc/
H A DFSFChangeLog2234 * i386.md (mov[sdx]fcc): Disable for now.
H A DFSFChangeLog.116579 (mov[sd]fcc*): Make operand[0,2] s_register_operands, and operand3
9918 * mips.md (mov[sd]fcc): Use register_operand, not reg_or_0_operand,
H A DChangeLog-200126115 * i386.md (sse_movdfcc_eq): Fix constraint (sse_mov?fcc splitter): Use operands_match_p
27145 * i386.md (sse_mov?fcc): Disallow EQ and NE in IEEE mode.
28695 * i386.md (sse_mov?fcc*): New patterns and splitters.
H A DChangeLog-200220369 (sse_mov?fcc split): abort if op2 == op3.
24114 * i386.md (sse_mov?fcc*): Revert patch of Mar 14th.
25236 * i386.md (sse_mov?fcc*): Swap operands for cases they will be swapped
H A DFSFChangeLog.10606 Use SPARC_FCC_REG. Don't treat reg 0 as an fcc reg. Don't match
H A DChangeLog-20037140 * config/sparc/sparc.md (length attribute) [fcc branch]: Add 1 to
33640 * config/i386/i386.md (sse_mov?fcc split): Handle op2 == op3 case
/freebsd-12.1/contrib/binutils/gas/
H A DChangeLog-02033873 * config/tc-mips.c (md_begin): Add $fcc registers to the symbol
/freebsd-12.1/share/misc/
H A Dpci_vendors22039 1fcc StreamLabs
29257 6fcc Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Power Control Unit

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