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Searched refs:div_shift (Results 1 – 12 of 12) sorted by relevance

/freebsd-12.1/sys/arm/freescale/vybrid/
H A Dvf_ccm.c160 uint32_t div_shift; member
172 .div_shift = IPG_CLK_DIV_SHIFT,
208 .div_shift = SAI3_DIV_SHIFT,
220 .div_shift = CKO1_DIV_SHIFT,
232 .div_shift = ESDHC0_DIV_S,
244 .div_shift = ESDHC1_DIV_S,
256 .div_shift = 0,
268 .div_shift = 16, /* DCU0_DIV */
280 .div_shift = 0,
292 .div_shift = 0,
[all …]
/freebsd-12.1/sys/arm64/rockchip/clk/
H A Drk3399_cru.c854 .div_shift = 0,
876 .div_shift = 8,
925 .div_shift = 0,
947 .div_shift = 8,
994 .div_shift = 0,
1015 .div_shift = 0,
1033 .div_shift = 8,
1067 .div_shift = 0,
1089 .div_shift = 0,
1111 .div_shift = 0,
[all …]
H A Drk3328_cru.c607 .div_shift = 8,
680 .div_shift = 0,
706 .div_shift = 8,
751 .div_shift = 0,
771 .div_shift = 0,
789 .div_shift = 4,
816 .div_shift = 0,
841 .div_shift = 0,
866 .div_shift = 0,
894 .div_shift = 0,
[all …]
H A Drk_clk_composite.c50 uint32_t div_shift; member
157 div = ((reg & sc->div_mask) >> sc->div_shift) + 1; in rk_clk_composite_recalc()
172 div <= ((sc->div_mask >> sc->div_shift) + 1); div++) { in rk_clk_composite_find_best()
242 val |= (best_div - 1) << sc->div_shift; in rk_clk_composite_set_freq()
243 val |= (sc->div_mask << sc->div_shift) << RK_CLK_COMPOSITE_MASK_SHIFT; in rk_clk_composite_set_freq()
287 sc->div_shift = clkdef->div_shift; in rk_clk_composite_register()
289 sc->div_mask = ((1 << clkdef->div_width) - 1) << sc->div_shift; in rk_clk_composite_register()
H A Drk_clk_armclk.c50 uint32_t div_shift; member
134 div = ((reg & sc->div_mask) >> sc->div_shift) + 1; in rk_clk_armclk_recalc()
194 val |= (div - 1) << sc->div_shift; in rk_clk_armclk_set_freq()
238 sc->div_shift = clkdef->div_shift; in rk_clk_armclk_register()
240 sc->div_mask = ((1 << clkdef->div_width) - 1) << sc->div_shift; in rk_clk_armclk_register()
H A Drk3399_pmucru.c727 .div_shift = 0,
746 .div_shift = 0,
766 .div_shift = 8,
786 .div_shift = 0,
H A Drk_clk_composite.h44 uint32_t div_shift; member
H A Drk_clk_armclk.h49 uint32_t div_shift; member
/freebsd-12.1/sys/mips/ingenic/
H A Djz4780_clk_gen.c141 reg = (reg >> sc->clk_descr->clk_div.div_shift) & msk; in jz4780_clk_gen_recalc_freq()
205 reg &= ~(div_msk << sc->clk_descr->clk_div.div_shift); in jz4780_clk_gen_set_freq()
206 reg |= (div_reg << sc->clk_descr->clk_div.div_shift); in jz4780_clk_gen_set_freq()
H A Djz4780_clk.h58 uint16_t div_shift: 5; member
H A Djz4780_clock.c112 .clk_div.div_shift = (shift), \
/freebsd-12.1/sys/arm/nvidia/tegra124/
H A Dtegra124_clk_per.c528 uint32_t div_shift; member