| /freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFrameLowering.cpp | 176 SPReg = MRI.createVirtualRegister(PtrRC); in emitPrologue() 186 unsigned BasePtr = MRI.createVirtualRegister(PtrRC); in emitPrologue() 193 unsigned OffsetReg = MRI.createVirtualRegister(PtrRC); in emitPrologue() 202 unsigned BitmaskReg = MRI.createVirtualRegister(PtrRC); in emitPrologue() 247 unsigned OffsetReg = MRI.createVirtualRegister(PtrRC); in emitEpilogue() 252 SPReg = MRI.createVirtualRegister(PtrRC); in emitEpilogue()
|
| H A D | WebAssemblyRegisterInfo.cpp | 118 unsigned OffsetOp = MRI.createVirtualRegister(PtrRC); in eliminateFrameIndex() 122 FIRegOperand = MRI.createVirtualRegister(PtrRC); in eliminateFrameIndex()
|
| H A D | WebAssemblyISelLowering.cpp | 349 Tmp0 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt() 350 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt() 351 CmpReg = MRI.createVirtualRegister(&WebAssembly::I32RegClass); in LowerFPToInt() 352 EqzReg = MRI.createVirtualRegister(&WebAssembly::I32RegClass); in LowerFPToInt() 353 FalseReg = MRI.createVirtualRegister(MRI.getRegClass(OutReg)); in LowerFPToInt() 354 TrueReg = MRI.createVirtualRegister(MRI.getRegClass(OutReg)); in LowerFPToInt() 370 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt() 372 MRI.createVirtualRegister(&WebAssembly::I32RegClass); in LowerFPToInt() 373 unsigned AndReg = MRI.createVirtualRegister(&WebAssembly::I32RegClass); in LowerFPToInt() 836 MF.getRegInfo().createVirtualRegister(getRegClassFor(PtrVT)); in LowerFormalArguments()
|
| H A D | WebAssemblyExplicitLocals.cpp | 248 unsigned NewReg = MRI.createVirtualRegister(RC); in runOnMachineFunction() 277 unsigned NewReg = MRI.createVirtualRegister(RC); in runOnMachineFunction() 349 unsigned NewReg = MRI.createVirtualRegister(RC); in runOnMachineFunction()
|
| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 1927 unsigned DstElt = MRI.createVirtualRegister(EltRC); in insertSelect() 3308 unsigned Reg = MRI.createVirtualRegister(VRC); in legalizeOpWithMove() 3323 unsigned SubReg = MRI.createVirtualRegister(SubRC); in buildExtractSubReg() 3335 unsigned NewSuperReg = MRI.createVirtualRegister(SuperRC); in buildExtractSubReg() 3618 unsigned DstReg = MRI.createVirtualRegister(SRC); in readlaneVGPRToSGPR() 3682 unsigned DstReg = MRI.createVirtualRegister(DstRC); in legalizeGenericOperand() 4423 NewDstReg = MRI.createVirtualRegister(NewDstRC); in moveToVALU() 4649 unsigned DestSub0 = MRI.createVirtualRegister(NewDestSubRC); in splitScalar64BitUnaryOp() 4655 unsigned DestSub1 = MRI.createVirtualRegister(NewDestSubRC); in splitScalar64BitUnaryOp() 4658 unsigned FullDestReg = MRI.createVirtualRegister(NewDestRC); in splitScalar64BitUnaryOp() [all …]
|
| H A D | SIAddIMGInit.cpp | 134 MRI.createVirtualRegister(TII->getOpRegClass(MI, DstIdx)); in runOnMachineFunction() 152 MRI.createVirtualRegister(TII->getOpRegClass(MI, DstIdx)); in runOnMachineFunction() 155 MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in runOnMachineFunction()
|
| H A D | SILoadStoreOptimizer.cpp | 712 unsigned DestReg = MRI->createVirtualRegister(SuperRC); in mergeRead2Pair() 720 unsigned ImmReg = MRI->createVirtualRegister(&AMDGPU::SGPR_32RegClass); in mergeRead2Pair() 724 BaseReg = MRI->createVirtualRegister(&AMDGPU::VGPR_32RegClass); in mergeRead2Pair() 813 unsigned ImmReg = MRI->createVirtualRegister(&AMDGPU::SGPR_32RegClass); in mergeWrite2Pair() 817 BaseReg = MRI->createVirtualRegister(&AMDGPU::VGPR_32RegClass); in mergeWrite2Pair() 854 unsigned DestReg = MRI->createVirtualRegister(SuperRC); in mergeSBufferLoadImmPair() 897 unsigned DestReg = MRI->createVirtualRegister(SuperRC); in mergeBufferLoadPair() 1070 unsigned SrcReg = MRI->createVirtualRegister(SuperRC); in mergeBufferStorePair() 1111 unsigned Reg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass); in createRegOrImm() 1142 MRI->createVirtualRegister(&AMDGPU::SReg_64_XEXECRegClass); in computeBase() [all …]
|
| H A D | AMDGPUInstructionSelector.cpp | 89 unsigned DstReg = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass); in getSubOperand64() 126 unsigned DstLo = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); in selectG_ADD() 127 unsigned DstHi = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); in selectG_ADD() 264 unsigned Undef = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in selectG_INTRINSIC_W_SIDE_EFFECTS() 361 unsigned LoReg = MRI.createVirtualRegister(RC); in selectG_CONSTANT() 362 unsigned HiReg = MRI.createVirtualRegister(RC); in selectG_CONSTANT() 555 unsigned OffsetReg = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); in selectSMRD()
|
| H A D | SILowerControlFlow.cpp | 192 : MRI->createVirtualRegister(&AMDGPU::SReg_64RegClass); in emitIf() 198 unsigned Tmp = MRI->createVirtualRegister(&AMDGPU::SReg_64RegClass); in emitIf() 269 unsigned CopyReg = MRI->createVirtualRegister(&AMDGPU::SReg_64RegClass); in emitElse() 277 MRI->createVirtualRegister(&AMDGPU::SReg_64RegClass) : DstReg; in emitElse()
|
| H A D | SIRegisterInfo.cpp | 324 unsigned OffsetReg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass); in materializeFrameBaseRegister() 326 unsigned FIReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in materializeFrameBaseRegister() 683 M0CopyReg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass); in spillSGPR() 777 unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in spillSGPR() 853 M0CopyReg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass); in restoreSGPR() 929 unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in restoreSGPR() 1080 = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass); in eliminateFrameIndex() 1085 MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in eliminateFrameIndex() 1099 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in eliminateFrameIndex() 1112 = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass); in eliminateFrameIndex() [all …]
|
| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.cpp | 486 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in lowerDynamicAlloc() 494 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in lowerDynamicAlloc() 511 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in lowerDynamicAlloc() 519 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in lowerDynamicAlloc() 597 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling() 642 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRRestore() 689 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRBitSpilling() 767 unsigned Reg = MF.getRegInfo().createVirtualRegister(GPRC); in lowerVRSAVESpilling() 793 unsigned Reg = MF.getRegInfo().createVirtualRegister(GPRC); in lowerVRSAVERestore() 981 unsigned SRegHi = MF.getRegInfo().createVirtualRegister(RC), in eliminateFrameIndex() [all …]
|
| H A D | PPCVSXCopy.cpp | 110 unsigned NewVReg = MRI.createVirtualRegister(SrcRC); in processBlock() 132 unsigned NewVReg = MRI.createVirtualRegister(DstRC); in processBlock()
|
| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86SpeculativeLoadHardening.cpp | 450 PS->PoisonReg = MRI->createVirtualRegister(PS->RC); in runOnMachineFunction() 483 PS->InitialReg = MRI->createVirtualRegister(PS->RC); in runOnMachineFunction() 913 unsigned Reg = MRI->createVirtualRegister(UnfoldedRC); in unfoldCallAndJumpLoads() 1910 unsigned TmpReg = MRI->createVirtualRegister(PS->RC); in mergePredStateIntoSP() 1930 unsigned PredStateReg = MRI->createVirtualRegister(PS->RC); in extractPredStateFromSP() 1931 unsigned TmpReg = MRI->createVirtualRegister(PS->RC); in extractPredStateFromSP() 2030 unsigned TmpReg = MRI->createVirtualRegister(OpRC); in hardenLoadAddr() 2081 unsigned VStateReg = MRI->createVirtualRegister(OpRC); in hardenLoadAddr() 2296 unsigned NewReg = MRI->createVirtualRegister(RC); in hardenValueInRegister() 2487 ExpectedRetAddrReg = MRI->createVirtualRegister(AddrRC); in tracePredStateThroughCall() [all …]
|
| H A D | X86FixupSetCC.cpp | 164 unsigned ZeroReg = MRI->createVirtualRegister(RC); in runOnMachineFunction() 165 unsigned InsertReg = MRI->createVirtualRegister(RC); in runOnMachineFunction()
|
| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVExtract.cpp | 71 unsigned ElemR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass); in genElemLoad() 90 unsigned IdxR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass); in genElemLoad() 148 unsigned BaseR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass); in runOnMachineFunction()
|
| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | A15SDOptimizer.cpp | 422 unsigned Out = MRI->createVirtualRegister(QPR ? &ARM::QPRRegClass : in createDupLane() 438 unsigned Out = MRI->createVirtualRegister(TRC); in createExtractSubreg() 452 unsigned Out = MRI->createVirtualRegister(&ARM::QPRRegClass); in createRegSequence() 470 unsigned Out = MRI->createVirtualRegister(&ARM::DPRRegClass); in createVExt() 482 unsigned Out = MRI->createVirtualRegister(&ARM::DPR_VFP2RegClass); in createInsertSubreg() 498 unsigned Out = MRI->createVirtualRegister(&ARM::DPRRegClass); in createImplicitDef()
|
| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 3027 unsigned VR2 = RegInfo.createVirtualRegister(RC); in emitBPOSGE32() 3033 unsigned VR1 = RegInfo.createVirtualRegister(RC); in emitBPOSGE32() 3096 unsigned RD1 = RegInfo.createVirtualRegister(RC); in emitMSACBranchPseudo() 3102 unsigned RD2 = RegInfo.createVirtualRegister(RC); in emitMSACBranchPseudo() 3150 unsigned Wt = RegInfo.createVirtualRegister( in emitCOPY_FW() 3213 unsigned Wt = RegInfo.createVirtualRegister( in emitINSERT_FW() 3407 unsigned Wt1 = RegInfo.createVirtualRegister( in emitFILL_FW() 3410 unsigned Wt2 = RegInfo.createVirtualRegister( in emitFILL_FW() 3540 unsigned Rt = RegInfo.createVirtualRegister(RC); in emitLD_F16_PSEUDO() 3782 unsigned Ws1 = RegInfo.createVirtualRegister(RC); in emitFEXP2_W_1() [all …]
|
| H A D | MipsInstructionSelector.cpp | 152 unsigned HILOReg = MRI.createVirtualRegister(&Mips::ACC64RegClass); in select() 186 unsigned LUiReg = MRI.createVirtualRegister(&Mips::GPR32RegClass); in select() 211 unsigned LUiReg = MRI.createVirtualRegister(&Mips::GPR32RegClass); in select() 248 unsigned Temp = MRI.createVirtualRegister(&Mips::GPR32RegClass); in select()
|
| H A D | Mips16ISelDAGToDAG.cpp | 79 V0 = RegInfo.createVirtualRegister(RC); in initGlobalBaseReg() 80 V1 = RegInfo.createVirtualRegister(RC); in initGlobalBaseReg() 81 V2 = RegInfo.createVirtualRegister(RC); in initGlobalBaseReg()
|
| H A D | MipsSEFrameLowering.cpp | 175 unsigned VR = MRI.createVirtualRegister(RC); in expandLoadCCond() 190 unsigned VR = MRI.createVirtualRegister(RC); in expandStoreCCond() 208 unsigned VR0 = MRI.createVirtualRegister(RC); in expandLoadACC() 209 unsigned VR1 = MRI.createVirtualRegister(RC); in expandLoadACC() 233 unsigned VR0 = MRI.createVirtualRegister(RC); in expandStoreACC() 234 unsigned VR1 = MRI.createVirtualRegister(RC); in expandStoreACC() 266 unsigned VR0 = MRI.createVirtualRegister(RC); in expandCopyACC() 267 unsigned VR1 = MRI.createVirtualRegister(RC); in expandCopyACC() 542 unsigned VR = MF.getRegInfo().createVirtualRegister(RC); in emitPrologue()
|
| H A D | MipsISelLowering.cpp | 1546 unsigned ScrReg = RegInfo.createVirtualRegister(RC); in emitSignExtendToI32InReg() 1577 unsigned Mask = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() 1578 unsigned Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() 1579 unsigned Incr2 = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() 1581 unsigned PtrLSB2 = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() 1668 unsigned Off = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() 1733 unsigned Scratch = MRI.createVirtualRegister(RC); in emitAtomicCmpSwap() 1789 unsigned Mask = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() 1790 unsigned Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() 1851 unsigned Off = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() [all …]
|
| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 177 VRBase = MRI->createVirtualRegister(DstRC); in EmitCopyFromReg() 265 VRBase = MRI->createVirtualRegister(RC); in CreateVirtualRegisters() 295 VReg = MRI->createVirtualRegister(RC); in getVR() 343 unsigned NewVReg = MRI->createVirtualRegister(OpRC); in AddRegisterOperand() 407 unsigned NewVReg = MRI->createVirtualRegister(IIRC); in AddOperand() 485 unsigned NewReg = MRI->createVirtualRegister(RC); in ConstrainForSubReg() 541 VRBase = MRI->createVirtualRegister(TRC); in EmitSubregNode() 556 VRBase = MRI->createVirtualRegister(TRC); in EmitSubregNode() 593 VRBase = MRI->createVirtualRegister(SRC); in EmitSubregNode() 634 unsigned NewVReg = MRI->createVirtualRegister(DstRC); in EmitCopyToRegClassNode() [all …]
|
| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstructionSelector.cpp | 338 unsigned CopyReg = MRI.createVirtualRegister(&AArch64::FPR32RegClass); in selectFP16CopyFromGPR32() 890 const unsigned DefGPRReg = MRI.createVirtualRegister(&GPRRC); in select() 1306 MRI.createVirtualRegister(&AArch64::GPR64RegClass); in select() 1483 Def1Reg = MRI.createVirtualRegister(&AArch64::GPR32RegClass); in select() 1568 Dst = MRI.createVirtualRegister(DstRC); in emitScalarToVector() 1570 unsigned UndefVec = MRI.createVirtualRegister(DstRC); in emitScalarToVector() 1613 unsigned SubToRegDef = MRI.createVirtualRegister(DstRC); in selectMergeValues() 1620 unsigned SubToRegDef2 = MRI.createVirtualRegister(DstRC); in selectMergeValues() 1685 InsDef = MRI.createVirtualRegister(DstRC); in selectBuildVector() 1690 unsigned ImpDef = MRI.createVirtualRegister(DstRC); in selectBuildVector() [all …]
|
| H A D | AArch64AdvSIMDScalarPass.cpp | 344 Src0 = MRI->createVirtualRegister(&AArch64::FPR64RegClass); in transformInstruction() 350 Src1 = MRI->createVirtualRegister(&AArch64::FPR64RegClass); in transformInstruction() 358 unsigned Dst = MRI->createVirtualRegister(&AArch64::FPR64RegClass); in transformInstruction()
|
| /freebsd-12.1/contrib/llvm/lib/Target/Lanai/ |
| H A D | LanaiMachineFunctionInfo.cpp | 22 MF.getRegInfo().createVirtualRegister(&Lanai::GPRRegClass); in getGlobalBaseReg()
|