Searched refs:constrainGenericRegister (Results 1 – 8 of 8) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 302 if (!RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectCopy() 688 if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) || in selectTurnIntoCOPY() 689 !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectTurnIntoCOPY() 751 if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) || in selectTruncOrPtrToInt() 752 !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectTruncOrPtrToInt() 907 if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) || in selectAnyext() 908 !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectAnyext() 1023 RBI.constrainGenericRegister( in selectFCmp() 1216 if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) || in emitExtractSubreg() 1217 !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in emitExtractSubreg() [all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 76 RBI.constrainGenericRegister(MO.getReg(), *RC, MRI); in selectCOPY() 157 RBI.constrainGenericRegister(MO.getReg(), AMDGPU::SReg_64RegClass, MRI); in selectG_ADD() 176 RBI.constrainGenericRegister(MO.getReg(), *RC, MRI); in selectG_IMPLICIT_DEF() 385 return RBI.constrainGenericRegister(DstReg, *DstRC, MRI); in selectG_CONSTANT()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstructionSelector.cpp | 429 if (!RBI.constrainGenericRegister(DstReg, *RC, MRI)) { in selectCopy() 756 return RBI.constrainGenericRegister(DefReg, *DefRC, MRI); in select() 899 if (!RBI.constrainGenericRegister(DefReg, FPRRC, MRI)) { in select() 944 RBI.constrainGenericRegister(I.getOperand(0).getReg(), in select() 979 RBI.constrainGenericRegister(I.getOperand(2).getReg(), in select() 1202 if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) || in select() 1203 !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in select() 1299 if (!RBI.constrainGenericRegister(SrcReg, AArch64::GPR32RegClass, MRI)) { in select() 1534 RBI.constrainGenericRegister(DstReg, *DstRC, MRI); in select()
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | RegisterBankInfo.h | 629 constrainGenericRegister(unsigned Reg, const TargetRegisterClass &RC,
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 36 if (!RBI.constrainGenericRegister(Reg, RegClass, MRI)) { in constrainRegToClass()
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| H A D | RegisterBankInfo.cpp | 128 const TargetRegisterClass *RegisterBankInfo::constrainGenericRegister( in constrainGenericRegister() function in RegisterBankInfo
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| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsInstructionSelector.cpp | 86 if (!RBI.constrainGenericRegister(DstReg, *RC, MRI)) { in selectCopy()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 194 if (!RBI.constrainGenericRegister(DstReg, *RC, MRI)) { in selectCopy() 1012 if (!RBI.constrainGenericRegister(DstReg, *RC, MRI)) { in select()
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