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Searched refs:chipselect (Results 1 – 16 of 16) sorted by relevance

/freebsd-12.1/sys/mips/nlm/
H A Dboard_cpld.c82 uint64_t nlm_board_cpld_base(int node, int chipselect) in nlm_board_cpld_base() argument
87 cpld_phys = nlm_read_gbu_reg(gbubase, GBU_CS_BASEADDR(chipselect)); in nlm_board_cpld_base()
H A Dboard.h152 uint64_t nlm_board_cpld_base(int node, int chipselect);
/freebsd-12.1/sys/gnu/dts/arm/
H A Dkeystone-k2l-evm.dts67 ti,cs-chipselect = <0>;
84 ti,davinci-chipselect = <0>;
H A Dkeystone-k2e-evm.dts94 ti,cs-chipselect = <0>;
111 ti,davinci-chipselect = <0>;
H A Dkeystone-k2hk-evm.dts111 ti,cs-chipselect = <0>;
128 ti,davinci-chipselect = <0>;
H A Dda850-lcdk.dts309 ti,cs-chipselect = <3>;
318 ti,davinci-chipselect = <1>;
H A Dda850-evm.dts415 ti,cs-chipselect = <3>;
424 ti,davinci-chipselect = <1>;
H A Dimx6qdl-dfi-fs700-m60.dtsi152 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
H A Dimx6qdl-phytec-pfla02.dtsi230 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
H A Dvexpress-v2m-rs1.dtsi28 #address-cells = <2>; /* SMB chipselect number and offset */
H A Dvexpress-v2m.dtsi28 #address-cells = <2>; /* SMB chipselect number and offset */
H A Dqcom-apq8060-dragonboard.dts606 * SLOW chipselect config
/freebsd-12.1/sys/gnu/dts/arm64/arm/
H A Dfoundation-v8.dtsi98 #address-cells = <2>; /* SMB chipselect number and offset */
H A Drtsm_ve-motherboard.dtsi15 #address-cells = <2>; /* SMB chipselect number and offset */
H A Djuno-motherboard.dtsi42 #address-cells = <2>; /* SMB chipselect number and offset */
H A Dvexpress-v2m-rs1.dtsi28 #address-cells = <2>; /* SMB chipselect number and offset */