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Searched refs:XLenVT (Results 1 – 8 of 8) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp68 MVT XLenVT) { in selectImm() argument
70 RISCVMatInt::generateInstSeq(Imm, XLenVT == MVT::i64, Seq); in selectImm()
73 SDValue SrcReg = CurDAG->getRegister(RISCV::X0, XLenVT); in selectImm()
75 SDValue SDImm = CurDAG->getTargetConstant(Inst.Imm, DL, XLenVT); in selectImm()
77 Result = CurDAG->getMachineNode(RISCV::LUI, DL, XLenVT, SDImm); in selectImm()
110 MVT XLenVT = Subtarget->getXLenVT(); in Select() local
117 if (VT == XLenVT && ConstNode->isNullValue()) { in Select()
119 RISCV::X0, XLenVT); in Select()
124 if (XLenVT == MVT::i64) { in Select()
131 SDValue Imm = CurDAG->getTargetConstant(0, DL, XLenVT); in Select()
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H A DRISCVISelLowering.cpp46 MVT XLenVT = Subtarget.getXLenVT(); in RISCVTargetLowering() local
49 addRegisterClass(XLenVT, &RISCV::GPRRegClass); in RISCVTargetLowering()
68 setOperationAction(ISD::BR_CC, XLenVT, Expand); in RISCVTargetLowering()
109 setOperationAction(ISD::ROTL, XLenVT, Expand); in RISCVTargetLowering()
110 setOperationAction(ISD::ROTR, XLenVT, Expand); in RISCVTargetLowering()
347 MVT XLenVT = Subtarget.getXLenVT(); in lowerGlobalAddress() local
413 MVT XLenVT = Subtarget.getXLenVT(); in lowerSELECT() local
492 MVT XLenVT = Subtarget.getXLenVT(); in lowerRETURNADDR() local
866 LocVT = XLenVT; in CC_RISCV()
1120 MVT XLenVT = Subtarget.getXLenVT(); in LowerFormalArguments() local
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H A DRISCVInstrInfoC.td22 def uimmlog2xlennonzero : Operand<XLenVT>, ImmLeaf<XLenVT, [{
40 def simm6 : Operand<XLenVT>, ImmLeaf<XLenVT, [{return isInt<6>(Imm);}]> {
52 def simm6nonzero : Operand<XLenVT>,
77 def c_lui_imm : Operand<XLenVT>,
94 def uimm7_lsb00 : Operand<XLenVT>,
108 def uimm8_lsb00 : Operand<XLenVT>,
122 def uimm8_lsb000 : Operand<XLenVT>,
150 def uimm9_lsb000 : Operand<XLenVT>,
165 def uimm10_lsb00nonzero : Operand<XLenVT>,
166 ImmLeaf<XLenVT,
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H A DRISCVRegisterInfo.td87 def XLenVT : ValueTypeByHwMode<[RV32, RV64, DefaultMode],
92 def GPR : RegisterClass<"RISCV", [XLenVT], 32, (add
107 def GPRNoX0 : RegisterClass<"RISCV", [XLenVT], 32, (add
120 def GPRNoX0X2 : RegisterClass<"RISCV", [XLenVT], 32, (add
133 def GPRC : RegisterClass<"RISCV", [XLenVT], 32, (add
145 def GPRTC : RegisterClass<"RISCV", [XLenVT], 32, (add
155 def SP : RegisterClass<"RISCV", [XLenVT], 32, (add X2)> {
H A DRISCVInstrInfo.td81 def fencearg : Operand<XLenVT> {
93 def uimmlog2xlen : Operand<XLenVT>, ImmLeaf<XLenVT, [{
111 def uimm5 : Operand<XLenVT>, ImmLeaf<XLenVT, [{return isUInt<5>(Imm);}]> {
116 def simm12 : Operand<XLenVT>, ImmLeaf<XLenVT, [{return isInt<12>(Imm);}]> {
141 class UImm20Operand : Operand<XLenVT> {
184 def bare_symbol : Operand<XLenVT> {
194 def csr_sysreg : Operand<XLenVT> {
201 def ixlenimm : Operand<XLenVT>;
203 def ixlenimm_li : Operand<XLenVT> {
211 def immbottomxlenset : ImmLeaf<XLenVT, [{
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H A DRISCVSubtarget.h41 MVT XLenVT = MVT::i32; variable
82 MVT getXLenVT() const { return XLenVT; } in getXLenVT()
H A DRISCVSubtarget.cpp38 XLenVT = MVT::i64; in initializeSubtargetDependencies()
H A DRISCVInstrInfoF.td27 def frmarg : Operand<XLenVT> {