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Searched refs:W2 (Results 1 – 25 of 26) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Support/
H A DBinaryStreamWriter.cpp79 BinaryStreamWriter W2{Second}; in split() local
80 return std::make_pair(W1, W2); in split()
H A DBinaryStreamReader.cpp147 BinaryStreamReader W2{Second}; in split() local
148 return std::make_pair(W1, W2); in split()
/freebsd-12.1/contrib/llvm/lib/Target/BPF/
H A DBPFCallingConv.td38 CCIfType<[i32], CCAssignToRegWithShadow<[W1, W2, W3, W4, W5],
43 [W1, W2, W3, W4, W5]>>,
/freebsd-12.1/contrib/llvm/lib/Transforms/IPO/
H A DThinLTOBitcodeWriter.cpp410 BitcodeWriter W2(Buffer); in splitAndWriteThinLTOBitcode() local
412 W2.writeThinLinkBitcode(M, Index, ModHash); in splitAndWriteThinLTOBitcode()
413 W2.writeModule(*MergedM, /*ShouldPreserveUseListOrder=*/false, in splitAndWriteThinLTOBitcode()
415 W2.writeSymtab(); in splitAndWriteThinLTOBitcode()
416 W2.writeStrtab(); in splitAndWriteThinLTOBitcode()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.td60 CCIfType<[i32], CCAssignToRegWithShadow<[W0, W1, W2, W3, W4, W5, W6, W7],
70 [W0, W1, W2, W3, W4, W5, W6, W7]>>,
107 CCIfType<[i32], CCAssignToRegWithShadow<[W0, W1, W2, W3, W4, W5, W6, W7],
110 [W0, W1, W2, W3, W4, W5, W6, W7]>>,
159 CCIfType<[i32], CCAssignToRegWithShadow<[W0, W1, W2, W3, W4, W5, W6, W7],
164 [W0, W1, W2, W3, W4, W5, W6]>>>,
169 [W0, W1, W2, W3, W4, W5, W6, W7]>>,
228 CCIfType<[i32], CCAssignToRegWithShadow<[W0, W1, W2, W3, W4, W5, W6, W7],
231 [W0, W1, W2, W3, W4, W5, W6, W7]>>,
H A DAArch64RegisterInfo.td63 def W2 : AArch64Reg<2, "w2" >, DwarfRegNum<[2]>;
98 def X2 : AArch64Reg<2, "x2", [W2]>, DwarfRegAlias<W2>;
H A DAArch64FastISel.cpp2974 { AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, in fastLowerArguments()
H A DAArch64ISelLowering.cpp5237 .Case("w2", AArch64::W2) in getRegisterByName()
5255 ((Reg == AArch64::X2 || Reg == AArch64::W2) && in getRegisterByName()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonCallingConv.td90 CCAssignToReg<[W0,W1,W2,W3,W4,W5,W6,W7]>>>,
104 CCAssignToReg<[W0,W1,W2,W3,W4,W5,W6,W7]>>>,
H A DHexagonGenInsert.cpp338 uint16_t W1 = RC1.width(), W2 = RC2.width(); in operator ()() local
339 for (uint16_t i = 0, w = std::min(W1, W2); i < w; ++i) { in operator ()()
345 if (W1 != W2) in operator ()()
346 return W1 < W2; in operator ()()
356 uint16_t W1 = RC1.width(), W2 = RC2.width(); in operator ()() local
365 return Bit2 < W2; in operator ()()
367 if (W2 <= Bit2) in operator ()()
H A DBitTracker.cpp697 uint16_t W1 = A1.width(), W2 = A2.width(); in eINS() local
699 assert(AtN < W1 && AtN+W2 <= W1); in eINS()
702 if (W2 > 0) in eINS()
703 Res.insert(RegisterCell::ref(A2), BT::BitMask(AtN, AtN+W2-1)); in eINS()
H A DHexagonRegisterInfo.cpp75 W0, W1, W2, W3, W4, W5, W6, W7, W8, W9, W10, W11, W12, W13, W14, W15, 0 in getCallerSavedRegs()
H A DHexagonRegisterInfo.td194 def W2 : Rd< 4, "v5:4", [V4, V5]>, DwarfRegNum<[103]>;
213 def VQ1 : Rd< 4, "v7:4", [W2, W3]>, DwarfRegNum<[253]>;
H A DHexagonConstPropagation.cpp1206 unsigned W2 = A2.getBitWidth(); in evaluateCMPii() local
1207 unsigned MaxW = (W1 >= W2) ? W1 : W2; in evaluateCMPii()
/freebsd-12.1/contrib/bearssl/conf/
H A DWin.mk42 CFLAGS = -nologo -W2 -O2
/freebsd-12.1/crypto/openssl/apps/
H A Dserver.pem37 W2/MA0YV0ug2FYinHcZdvKM6dimH8GLfa3X8xKRfzjGjTiMSwsdjgMa4awY3tEHH
/freebsd-12.1/sbin/pfctl/
H A Dpf.os239 S3:64:1:60:M*,S,T,N,W2: Linux:2.5::Linux 2.5 (sometimes 2.4)
240 S4:64:1:60:M*,S,T,N,W2: Linux:2.5::Linux 2.5 (sometimes 2.4)
290 # 65535:64:1:60:M*,N,W2,N,N,T:Z:FreeBSD:5.1-5.4::5.1-current (3)
349 49152:64:0:52:M*,N,W2,N,N,S: IRIX:6.5:RFC1323:IRIX 6.5 (RFC1323)
355 49152:60:0:64:M*,N,W2,N,N,T,N,N,S: IRIX:6.5:IP27:IRIX 6.5 IP27
418 60352:128:1:64:M*,N,W2,N,N,T0,N,N,S: Windows:98::Windows 98
449 8192:128:1:52:M*,N,W2,N,N,S: Windows:Vista::Windows Vista/7
600 60352:128:1:64:M1460,N,W2,N,N,T,N,N,S: Alteon:ACEswitch::Alteon ACEswitch
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h34 case AArch64::X2: return AArch64::W2; in getWRegFromXReg()
74 case AArch64::W2: return AArch64::X2; in getXRegFromWReg()
/freebsd-12.1/contrib/llvm/lib/Target/BPF/Disassembler/
H A DBPFDisassembler.cpp113 BPF::W0, BPF::W1, BPF::W2, BPF::W3, BPF::W4, BPF::W5,
/freebsd-12.1/tools/tools/tinybsd/conf/wireless/etc/
H A Dpf.os305 49152:64:0:52:M*,N,W2,N,N,S: IRIX:6.5:RFC1323:IRIX 6.5 (RFC1323)
359 60352:128:1:64:M*,N,W2,N,N,T0,N,N,S: Windows:98::Windows 98
466 60352:64:0:52:M1460,N,W2,N,N,S: Clavister:7::Clavister firewall 7.x
472 60352:128:1:64:M1460,N,W2,N,N,T,N,N,S: Alteon:ACEswitch::Alteon ACEswitch
/freebsd-12.1/tools/tools/tinybsd/conf/firewall/etc/
H A Dpf.os305 49152:64:0:52:M*,N,W2,N,N,S: IRIX:6.5:RFC1323:IRIX 6.5 (RFC1323)
359 60352:128:1:64:M*,N,W2,N,N,T0,N,N,S: Windows:98::Windows 98
466 60352:64:0:52:M1460,N,W2,N,N,S: Clavister:7::Clavister firewall 7.x
472 60352:128:1:64:M1460,N,W2,N,N,T,N,N,S: Alteon:ACEswitch::Alteon ACEswitch
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp607 Hexagon::W0, Hexagon::W1, Hexagon::W2, Hexagon::W3, in DecodeHvxWRRegisterClass()
/freebsd-12.1/contrib/llvm/tools/clang/include/clang/Driver/
H A DCLCompatOptions.td179 def _SLASH_W2 : CLFlag<"W2">, HelpText<"Enable -Wall">, Alias<Wall>;
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp460 AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4,
/freebsd-12.1/contrib/sqlite3/tea/tclconfig/
H A Dtcl.m41246 CFLAGS_OPTIMIZE="-nologo -O2 -W2 ${runtime}"
1281 CFLAGS_OPTIMIZE="-nologo -O2 -W2 ${runtime}"

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