1 //===-- NVPTX.h - Top-level interface for NVPTX representation --*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the entry points for global functions defined in 11 // the LLVM NVPTX back-end. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_LIB_TARGET_NVPTX_NVPTX_H 16 #define LLVM_LIB_TARGET_NVPTX_NVPTX_H 17 18 #include "MCTargetDesc/NVPTXBaseInfo.h" 19 #include "llvm/ADT/StringMap.h" 20 #include "llvm/IR/Module.h" 21 #include "llvm/IR/Value.h" 22 #include "llvm/Support/ErrorHandling.h" 23 #include "llvm/Target/TargetMachine.h" 24 #include <cassert> 25 #include <iosfwd> 26 27 namespace llvm { 28 class NVPTXTargetMachine; 29 class FunctionPass; 30 class MachineFunctionPass; 31 class formatted_raw_ostream; 32 33 namespace NVPTXCC { 34 enum CondCodes { 35 EQ, 36 NE, 37 LT, 38 LE, 39 GT, 40 GE 41 }; 42 } 43 44 FunctionPass *createNVPTXISelDag(NVPTXTargetMachine &TM, 45 llvm::CodeGenOpt::Level OptLevel); 46 ModulePass *createNVPTXAssignValidGlobalNamesPass(); 47 ModulePass *createGenericToNVVMPass(); 48 FunctionPass *createNVVMIntrRangePass(unsigned int SmVersion); 49 FunctionPass *createNVVMReflectPass(unsigned int SmVersion); 50 MachineFunctionPass *createNVPTXPrologEpilogPass(); 51 MachineFunctionPass *createNVPTXReplaceImageHandlesPass(); 52 FunctionPass *createNVPTXImageOptimizerPass(); 53 FunctionPass *createNVPTXLowerArgsPass(const NVPTXTargetMachine *TM); 54 BasicBlockPass *createNVPTXLowerAllocaPass(); 55 MachineFunctionPass *createNVPTXPeephole(); 56 MachineFunctionPass *createNVPTXProxyRegErasurePass(); 57 58 Target &getTheNVPTXTarget32(); 59 Target &getTheNVPTXTarget64(); 60 61 namespace NVPTX { 62 enum DrvInterface { 63 NVCL, 64 CUDA 65 }; 66 67 // A field inside TSFlags needs a shift and a mask. The usage is 68 // always as follows : 69 // ((TSFlags & fieldMask) >> fieldShift) 70 // The enum keeps the mask, the shift, and all valid values of the 71 // field in one place. 72 enum VecInstType { 73 VecInstTypeShift = 0, 74 VecInstTypeMask = 0xF, 75 76 VecNOP = 0, 77 VecLoad = 1, 78 VecStore = 2, 79 VecBuild = 3, 80 VecShuffle = 4, 81 VecExtract = 5, 82 VecInsert = 6, 83 VecDest = 7, 84 VecOther = 15 85 }; 86 87 enum SimpleMove { 88 SimpleMoveMask = 0x10, 89 SimpleMoveShift = 4 90 }; 91 enum LoadStore { 92 isLoadMask = 0x20, 93 isLoadShift = 5, 94 isStoreMask = 0x40, 95 isStoreShift = 6 96 }; 97 98 namespace PTXLdStInstCode { 99 enum AddressSpace { 100 GENERIC = 0, 101 GLOBAL = 1, 102 CONSTANT = 2, 103 SHARED = 3, 104 PARAM = 4, 105 LOCAL = 5 106 }; 107 enum FromType { 108 Unsigned = 0, 109 Signed, 110 Float, 111 Untyped 112 }; 113 enum VecType { 114 Scalar = 1, 115 V2 = 2, 116 V4 = 4 117 }; 118 } 119 120 /// PTXCvtMode - Conversion code enumeration 121 namespace PTXCvtMode { 122 enum CvtMode { 123 NONE = 0, 124 RNI, 125 RZI, 126 RMI, 127 RPI, 128 RN, 129 RZ, 130 RM, 131 RP, 132 133 BASE_MASK = 0x0F, 134 FTZ_FLAG = 0x10, 135 SAT_FLAG = 0x20 136 }; 137 } 138 139 /// PTXCmpMode - Comparison mode enumeration 140 namespace PTXCmpMode { 141 enum CmpMode { 142 EQ = 0, 143 NE, 144 LT, 145 LE, 146 GT, 147 GE, 148 LO, 149 LS, 150 HI, 151 HS, 152 EQU, 153 NEU, 154 LTU, 155 LEU, 156 GTU, 157 GEU, 158 NUM, 159 // NAN is a MACRO 160 NotANumber, 161 162 BASE_MASK = 0xFF, 163 FTZ_FLAG = 0x100 164 }; 165 } 166 } 167 } // end namespace llvm; 168 169 // Defines symbolic names for NVPTX registers. This defines a mapping from 170 // register name to register number. 171 #define GET_REGINFO_ENUM 172 #include "NVPTXGenRegisterInfo.inc" 173 174 // Defines symbolic names for the NVPTX instructions. 175 #define GET_INSTRINFO_ENUM 176 #include "NVPTXGenInstrInfo.inc" 177 178 #endif 179