| /freebsd-12.1/contrib/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 158 unsigned CallLowering::ValueHandler::extendRegister(unsigned ValReg, in extendRegister() argument
167 return ValReg; in extendRegister()
169 auto MIB = MIRBuilder.buildAnyExt(LocTy, ValReg); in extendRegister()
174 MIRBuilder.buildSExt(NewReg, ValReg); in extendRegister()
179 MIRBuilder.buildZExt(NewReg, ValReg); in extendRegister()
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| H A D | LegalizerHelper.cpp | 1230 unsigned ValReg = MI.getOperand(0).getReg(); in fewerElementsVector() local
1233 unsigned Size = MRI.getType(ValReg).getSizeInBits(); in fewerElementsVector()
1238 extractParts(ValReg, NarrowTy, NumParts, NarrowRegs); in fewerElementsVector()
1262 MIRBuilder.buildConcatVectors(ValReg, NarrowRegs); in fewerElementsVector()
1264 MIRBuilder.buildBuildVector(ValReg, NarrowRegs); in fewerElementsVector()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86SelectionDAGInfo.cpp | 129 unsigned ValReg; in EmitTargetCodeForMemset() local
136 ValReg = X86::AX; in EmitTargetCodeForMemset()
141 ValReg = X86::EAX; in EmitTargetCodeForMemset()
146 ValReg = X86::RAX; in EmitTargetCodeForMemset()
152 ValReg = X86::AL; in EmitTargetCodeForMemset()
163 Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, dl, AVT), in EmitTargetCodeForMemset()
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| H A D | X86FastISel.cpp | 93 bool X86FastEmitStore(EVT VT, unsigned ValReg, bool ValIsKill,
496 bool X86FastISel::X86FastEmitStore(EVT VT, unsigned ValReg, bool ValIsKill, in X86FastEmitStore() argument
517 .addReg(ValReg, getKillRegState(ValIsKill)).addImm(1); in X86FastEmitStore()
518 ValReg = AndResult; in X86FastEmitStore()
660 ValReg = constrainOperandRegClass(Desc, ValReg, Desc.getNumOperands() - 1); in X86FastEmitStore()
663 addFullAddress(MIB, AM).addReg(ValReg, getKillRegState(ValIsKill)); in X86FastEmitStore()
707 unsigned ValReg = getRegForValue(Val); in X86FastEmitStore() local
708 if (ValReg == 0) in X86FastEmitStore()
712 return X86FastEmitStore(VT, ValReg, ValKill, AM, MMO, Aligned); in X86FastEmitStore()
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| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 208 unsigned extendRegister(unsigned ValReg, const CCValAssign &VA);
253 unsigned OutgoingValueHandler::extendRegister(unsigned ValReg, in extendRegister() argument
259 MIRBuilder.buildSExt(ExtReg, ValReg); in extendRegister()
264 MIRBuilder.buildZExt(ExtReg, ValReg); in extendRegister()
269 MIRBuilder.buildAnyExt(ExtReg, ValReg); in extendRegister()
274 return ValReg; in extendRegister()
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| /freebsd-12.1/contrib/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandPseudoInsts.cpp | 320 MachineBasicBlock *MBB, unsigned ValReg, in insertSext() argument
322 BuildMI(MBB, DL, TII->get(RISCV::SLL), ValReg) in insertSext()
323 .addReg(ValReg) in insertSext()
325 BuildMI(MBB, DL, TII->get(RISCV::SRA), ValReg) in insertSext()
326 .addReg(ValReg) in insertSext()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMAsmPrinter.cpp | 1783 unsigned ValReg = MI->getOperand(1).getReg(); in EmitInstruction() local
1787 .addReg(ValReg) in EmitInstruction()
1794 .addReg(ValReg) in EmitInstruction()
1797 .addReg(ValReg) in EmitInstruction()
1804 .addReg(ValReg) in EmitInstruction()
1849 unsigned ValReg = MI->getOperand(1).getReg(); in EmitInstruction() local
1853 .addReg(ValReg) in EmitInstruction()
1863 .addReg(ValReg) in EmitInstruction()
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CallLowering.h | 101 unsigned extendRegister(unsigned ValReg, CCValAssign &VA);
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstructionSelector.cpp | 1056 const unsigned ValReg = I.getOperand(0).getReg(); in select() local
1057 const RegisterBank &RB = *RBI.getRegBank(ValReg, MRI, TRI); in select()
1092 if (auto CVal = getConstantVRegVal(ValReg, MRI)) { in select()
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