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Searched refs:VT0 (Results 1 – 5 of 5) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DAMDGPURewriteOutArguments.cpp211 VectorType *VT0 = dyn_cast<VectorType>(Ty0); in isVec3ToVec4Shuffle() local
213 if (!VT0 || !VT1) in isVec3ToVec4Shuffle()
216 if (VT0->getNumElements() != 3 || in isVec3ToVec4Shuffle()
220 return DL->getTypeSizeInBits(VT0->getElementType()) == in isVec3ToVec4Shuffle()
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp3522 EVT VT0 = getSetCCResultType(SETCC0.getOperand(0).getValueType()); in WidenVSELECTAndMask() local
3524 unsigned ScalarBits0 = VT0.getScalarSizeInBits(); in WidenVSELECTAndMask()
3532 EVT NarrowVT = ((ScalarBits0 < ScalarBits1) ? VT0 : VT1); in WidenVSELECTAndMask()
3533 EVT WideVT = ((NarrowVT == VT0) ? VT1 : VT0); in WidenVSELECTAndMask()
3542 MaskVT = VT0; in WidenVSELECTAndMask()
3545 SETCC0 = convertMask(SETCC0, VT0, MaskVT); in WidenVSELECTAndMask()
H A DDAGCombiner.cpp7365 EVT VT0 = N0.getValueType(); in visitSELECT() local
7373 if (VT == VT0 && VT == MVT::i1 && (N0 == N1 || isOneConstant(N1))) in visitSELECT()
7380 if (VT == VT0 && VT == MVT::i1 && isNullConstant(N1)) { in visitSELECT()
7386 if (VT == VT0 && VT == MVT::i1 && isOneConstant(N2)) { in visitSELECT()
7393 if (VT == VT0 && VT == MVT::i1 && (N0 == N2 || isNullConstant(N2))) in visitSELECT()
7400 if (VT0 == MVT::i1) { in visitSELECT()
7469 if (VT0 == MVT::i1) { in visitSELECT()
7512 SDVTList VTs = DAG.getVTList(VT, VT0); in visitSELECT()
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp75 for (MVT VT0 : MVT::vector_valuetypes()) { in MipsSETargetLowering() local
77 setTruncStoreAction(VT0, VT1, Expand); in MipsSETargetLowering()
78 setLoadExtAction(ISD::SEXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
79 setLoadExtAction(ISD::ZEXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
80 setLoadExtAction(ISD::EXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp31761 EVT VT0 = BC0.getValueType(); in combineTargetShuffle() local
31765 if (Opcode0 == Opcode1 && VT0 == VT1 && in combineTargetShuffle()
31777 SDValue Horiz = DAG.getNode(Opcode0, DL, VT0, Lo, Hi); in combineTargetShuffle()
36139 EVT VT0 = Op0.getValueType(); in combineAndMaskToShift() local
36142 if (VT0 != VT1 || !VT0.isSimple() || !VT0.isInteger()) in combineAndMaskToShift()
36154 if (!SupportedVectorShiftWithImm(VT0.getSimpleVT(), Subtarget, ISD::SRL)) in combineAndMaskToShift()
36157 unsigned EltBitWidth = VT0.getScalarSizeInBits(); in combineAndMaskToShift()
36164 SDValue Shift = DAG.getNode(X86ISD::VSRLI, DL, VT0, Op0, ShAmt); in combineAndMaskToShift()