Searched refs:VROR (Results 1 – 4 of 4) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 483 HalfV0 = DAG.getNode(HexagonISD::VROR, dl, VecTy, {N, S}); in buildHvxVectorReg() 484 HalfV1 = DAG.getNode(HexagonISD::VROR, dl, VecTy, {M, S}); in buildHvxVectorReg() 487 HalfV0 = DAG.getNode(HexagonISD::VROR, dl, VecTy, in buildHvxVectorReg() 575 Vec = DAG.getNode(HexagonISD::VROR, dl, ByteTy, Vec, S4); in createHvxPrefixPred() 717 SDValue TorV = DAG.getNode(HexagonISD::VROR, dl, VecTy, {InsV, SubV}); in insertHvxElementReg() 921 SingleV = DAG.getNode(HexagonISD::VROR, dl, SingleTy, SingleV, IdxV); in insertHvxSubvectorReg() 935 SingleV = DAG.getNode(HexagonISD::VROR, dl, SingleTy, SingleV, in insertHvxSubvectorReg() 944 SingleV = DAG.getNode(HexagonISD::VROR, dl, SingleTy, SingleV, RolV); in insertHvxSubvectorReg() 981 ByteVec = DAG.getNode(HexagonISD::VROR, dl, ByteTy, ByteVec, ByteIdx); in insertHvxSubvectorPred() 995 ByteVec = DAG.getNode(HexagonISD::VROR, dl, ByteTy, ByteVec, ByteXdi); in insertHvxSubvectorPred() [all …]
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| H A D | HexagonISelLowering.h | 67 VROR, enumerator
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| H A D | HexagonISelDAGToDAG.cpp | 899 case HexagonISD::VROR: return SelectHvxRor(N); in Select()
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| H A D | HexagonISelLowering.cpp | 1643 case HexagonISD::VROR: return "HexagonISD::VROR"; in getTargetNodeName()
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