Searched refs:VLD (Results 1 – 6 of 6) sorted by relevance
86 // Read the unwritten lanes of the VLD's destination registers.
1176 // VLD/VST instructions and checking the alignment is not specified.1187 // VLD/VST instructions and checking the alignment value.1198 // VLD/VST instructions and checking the alignment value.1209 // VLD/VST instructions and checking the alignment value.1220 // for VLD/VST instructions and checking the alignment value.1231 // encoding for VLD/VST instructions and checking the alignment value.1241 // Special version of addrmode6 to handle alignment encoding for VLD-dup1262 // VLD-dup instruction and checking the alignment is not specified.1272 // Special version of addrmode6 to handle 16-bit alignment encoding for VLD-dup1294 // Special version of addrmode6 to handle 64-bit alignment encoding for VLD[all …]
11800 SDNode *VLD = N->getOperand(0).getNode(); in CombineVLDDUP() local11801 if (VLD->getOpcode() != ISD::INTRINSIC_W_CHAIN) in CombineVLDDUP()11805 unsigned IntNo = cast<ConstantSDNode>(VLD->getOperand(1))->getZExtValue(); in CombineVLDDUP()11822 cast<ConstantSDNode>(VLD->getOperand(NumVecs+3))->getZExtValue(); in CombineVLDDUP()11823 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP()11841 SDValue Ops[] = { VLD->getOperand(0), VLD->getOperand(2) }; in CombineVLDDUP()11842 MemIntrinsicSDNode *VLDMemInt = cast<MemIntrinsicSDNode>(VLD); in CombineVLDDUP()11843 SDValue VLDDup = DAG.getMemIntrinsicNode(NewOpc, SDLoc(VLD), SDTys, in CombineVLDDUP()11848 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP()11864 DCI.CombineTo(VLD, VLDDupResults); in CombineVLDDUP()
155 "VLD(1|2)LN(d|q)(WB_fixed_|WB_register_)?Asm",156 "VLD(3|4)(DUP|LN)?(d|q)(WB_fixed_|WB_register_)?Asm",
620 // Classes for VLD* pseudo-instructions with multi-register operands.1046 // Classes for VLD*LN pseudo-instructions with multi-register operands.
1891 register lists for VLD<n>/VST<n> instructions.