Searched refs:VCGT (Results 1 – 8 of 8) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 131 VCGT, // Vector compare greater than. enumerator
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| H A D | ARMISelLowering.cpp | 1329 case ARMISD::VCGT: return "ARMISD::VCGT"; in getTargetNodeName() 5570 case ISD::SETGT: Opc = ARMISD::VCGT; break; in LowerVSETCC() 5576 case ISD::SETULE: Invert = true; Opc = ARMISD::VCGT; break; in LowerVSETCC() 5585 Op0 = DAG.getNode(ARMISD::VCGT, dl, CmpVT, TmpOp1, TmpOp0); in LowerVSETCC() 5586 Op1 = DAG.getNode(ARMISD::VCGT, dl, CmpVT, TmpOp0, TmpOp1); in LowerVSETCC() 5596 Op0 = DAG.getNode(ARMISD::VCGT, dl, CmpVT, TmpOp1, TmpOp0); in LowerVSETCC() 5607 case ISD::SETGT: Opc = ARMISD::VCGT; break; in LowerVSETCC() 5648 else if (Opc == ARMISD::VCGT) in LowerVSETCC() 5662 case ARMISD::VCGT: in LowerVSETCC()
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| H A D | ARMScheduleSwift.td | 572 "VCEQ", "VCGE", "VCGT", "VCLE", "VCLT", "VRSHL",
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| H A D | ARMScheduleR52.td | 795 (instregex "(VCEQ|VCGE|VCGT|VCLE|VCLT|VCLZ|VCMP|VCMPE|VCNT)")>;
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| H A D | ARMScheduleA57.td | 1009 (instregex "VCEQ", "VCGE", "VCGT", "VCLE", "VTST", "VCLT")>;
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| H A D | ARMScheduleA9.td | 2435 // VSBH/VRSBH/VHSUB/VQSUB/VABD/VCEQ/VCGE/VCGT/VMAX/VMIN/VPMAX/VPMIN/VABDL
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| H A D | ARMInstrNEON.td | 491 def NEONvcgt : SDNode<"ARMISD::VCGT", SDTARMVCMP>; 5044 // VCGT : Vector Compare Greater Than 8475 // VCLT (register) is an assembler alias for VCGT w/ the operands reversed. 8513 // VCLT (register) is an assembler alias for VCGT w/ the operands reversed.
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| /freebsd-12.1/contrib/llvm/tools/clang/include/clang/Basic/ |
| H A D | arm_neon.td | 272 def VCGT : SOpInst<"vcgt", "udd", "csifUcUsUiQcQsQiQfQUcQUsQUi", OP_GT>;
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