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Searched refs:UOps (Results 1 – 15 of 15) sorted by relevance

/freebsd-12.1/contrib/llvm/include/llvm/MCA/
H A DHWEventListener.h75 unsigned UOps) in HWInstructionDispatchedEvent() argument
77 UsedPhysRegs(Regs), MicroOpcodes(UOps) {} in HWInstructionDispatchedEvent()
/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DTargetSchedule.cpp111 int UOps = InstrItins.getNumMicroOps(MI->getDesc().getSchedClass()); in getNumMicroOps() local
112 return (UOps >= 0) ? UOps : TII->getNumMicroOps(&InstrItins, *MI); in getNumMicroOps()
H A DTargetInstrInfo.cpp1066 int UOps = ItinData->Itineraries[Class].NumMicroOps; in getNumMicroOps() local
1067 if (UOps >= 0) in getNumMicroOps()
1068 return UOps; in getNumMicroOps()
/freebsd-12.1/contrib/llvm/lib/MCA/Stages/
H A DDispatchStage.cpp31 unsigned UOps) const { in notifyInstructionDispatched()
34 HWInstructionDispatchedEvent(IR, UsedRegs, UOps)); in notifyInstructionDispatched()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86ScheduleBtVer2.td119 int Lat, list<int> Res = [], int UOps = 1,
125 let NumMicroOps = UOps;
133 let NumMicroOps = !add(UOps, LoadUOps);
139 int Lat, list<int> Res = [], int UOps = 1,
145 let NumMicroOps = UOps;
153 let NumMicroOps = !add(UOps, LoadUOps);
159 int Lat, list<int> Res = [2], int UOps = 2,
165 let NumMicroOps = UOps;
173 let NumMicroOps = !add(UOps, LoadUOps);
H A DX86ScheduleBdVer2.td193 list<int> Res = [], int UOps = 1> {
197 let NumMicroOps = UOps;
203 list<int> Res, int UOps,
205 defm : PdWriteRes<SchedRW, ExePorts, Lat, Res, UOps>;
213 !add(UOps, LoadUOps)>;
218 list<int> Res = [], int UOps = 1,
220 defm : __pdWriteResPair<SchedRW, ExePorts, Lat, Res, UOps,
226 list<int> Res = [], int UOps = 1,
228 defm : __pdWriteResPair<SchedRW, ExePorts, Lat, Res, UOps,
234 list<int> Res, int UOps = 2,
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H A DX86ScheduleSLM.td63 int Lat, list<int> Res = [1], int UOps = 1,
69 let NumMicroOps = UOps;
77 let NumMicroOps = UOps;
H A DX86ScheduleZnver1.td133 int Lat, list<int> Res = [], int UOps = 1,
139 let NumMicroOps = UOps;
147 let NumMicroOps = !add(UOps, LoadUOps);
154 int Lat, list<int> Res = [], int UOps = 1,
160 let NumMicroOps = UOps;
168 let NumMicroOps = !add(UOps, LoadUOps);
H A DX86SchedSandyBridge.td87 int Lat, list<int> Res = [1], int UOps = 1,
93 let NumMicroOps = UOps;
101 let NumMicroOps = !add(UOps, 1);
H A DX86Schedule.td28 int Lat, list<int> Res, int UOps> {
32 let NumMicroOps = UOps;
H A DX86SchedBroadwell.td92 int Lat, list<int> Res = [1], int UOps = 1,
98 let NumMicroOps = UOps;
106 let NumMicroOps = !add(UOps, 1);
H A DX86SchedHaswell.td97 int Lat, list<int> Res = [1], int UOps = 1,
103 let NumMicroOps = UOps;
111 let NumMicroOps = !add(UOps, 1);
H A DX86SchedSkylakeClient.td91 int Lat, list<int> Res = [1], int UOps = 1,
97 let NumMicroOps = UOps;
105 let NumMicroOps = !add(UOps, 1);
H A DX86SchedSkylakeServer.td91 int Lat, list<int> Res = [1], int UOps = 1,
97 let NumMicroOps = UOps;
105 let NumMicroOps = !add(UOps, 1);
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp3134 assert(UOps >= 0 && "bad # UOps"); in getNumMicroOpsSwiftLdSt()
3135 return UOps; in getNumMicroOpsSwiftLdSt()
3414 ++UOps; // One for base register writeback. in getNumMicroOpsSingleIssuePlusExtras()
3419 UOps += 2; // One for base reg wb, one for write to pc. in getNumMicroOpsSingleIssuePlusExtras()
3422 return UOps; in getNumMicroOpsSingleIssuePlusExtras()
3518 unsigned UOps = (NumRegs / 2); in getNumMicroOps() local
3520 ++UOps; in getNumMicroOps()
3521 return UOps; in getNumMicroOps()
3524 unsigned UOps = (NumRegs / 2); in getNumMicroOps() local
3529 ++UOps; in getNumMicroOps()
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