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Searched refs:TargetSubtargetInfo (Results 1 – 25 of 75) sorted by relevance

123

/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DTargetSubtargetInfo.cpp26 TargetSubtargetInfo::TargetSubtargetInfo( in TargetSubtargetInfo() function in TargetSubtargetInfo
35 TargetSubtargetInfo::~TargetSubtargetInfo() = default;
37 bool TargetSubtargetInfo::enableAtomicExpand() const { in enableAtomicExpand()
41 bool TargetSubtargetInfo::enableIndirectBrExpand() const { in enableIndirectBrExpand()
45 bool TargetSubtargetInfo::enableMachineScheduler() const { in enableMachineScheduler()
49 bool TargetSubtargetInfo::enableJoinGlobalCopies() const { in enableJoinGlobalCopies()
53 bool TargetSubtargetInfo::enableRALocalReassignment( in enableRALocalReassignment()
58 bool TargetSubtargetInfo::enableAdvancedRASplitCost() const { in enableAdvancedRASplitCost()
62 bool TargetSubtargetInfo::enablePostRAScheduler() const { in enablePostRAScheduler()
66 bool TargetSubtargetInfo::useAA() const { in useAA()
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H A DPostRASchedulerList.cpp109 TargetSubtargetInfo::AntiDepBreakMode &Mode,
150 TargetSubtargetInfo::AntiDepBreakMode AntiDepMode,
209 TargetSubtargetInfo::AntiDepBreakMode AntiDepMode, in SchedulePostRATDList()
224 ((AntiDepMode == TargetSubtargetInfo::ANTIDEP_ALL) ? in SchedulePostRATDList()
267 const TargetSubtargetInfo &ST, in enablePostRAScheduler()
269 TargetSubtargetInfo::AntiDepBreakMode &Mode, in enablePostRAScheduler()
293 TargetSubtargetInfo::AntiDepBreakMode AntiDepMode = in runOnMachineFunction()
294 TargetSubtargetInfo::ANTIDEP_NONE; in runOnMachineFunction()
306 ? TargetSubtargetInfo::ANTIDEP_ALL in runOnMachineFunction()
308 ? TargetSubtargetInfo::ANTIDEP_CRITICAL in runOnMachineFunction()
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H A DRegisterUsageInfo.cpp93 = TM->getSubtarget<TargetSubtargetInfo>(*(FPRMPair->first)) in print()
H A DAggressiveAntiDepBreaker.h135 TargetSubtargetInfo::RegClassVector& CriticalPathRCs);
H A DMacroFusion.cpp151 const TargetSubtargetInfo &ST = DAG.MF.getSubtarget(); in scheduleAdjacentImpl()
H A DScheduleDAGInstrs.cpp121 const TargetSubtargetInfo &ST = mf.getSubtarget(); in ScheduleDAGInstrs()
235 const TargetSubtargetInfo &ST = MF.getSubtarget(); in addPhysRegDataDeps()
409 const TargetSubtargetInfo &ST = MF.getSubtarget(); in addVRegDefDeps()
709 const TargetSubtargetInfo &ST = MF.getSubtarget(); in buildSchedGraph()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DTargetSubtargetInfo.h62 class TargetSubtargetInfo : public MCSubtargetInfo {
64 TargetSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS,
79 TargetSubtargetInfo() = delete;
80 TargetSubtargetInfo(const TargetSubtargetInfo &) = delete;
81 TargetSubtargetInfo &operator=(const TargetSubtargetInfo &) = delete;
82 ~TargetSubtargetInfo() override;
H A DTargetSchedule.h37 const TargetSubtargetInfo *STI = nullptr;
54 void init(const TargetSubtargetInfo *TSInfo);
60 const TargetSubtargetInfo *getSubtargetInfo() const { return STI; } in getSubtargetInfo()
H A DMacroFusion.h26 class TargetSubtargetInfo; variable
32 const TargetSubtargetInfo &TSI,
H A DMachineFunction.h75 class TargetSubtargetInfo; variable
229 const TargetSubtargetInfo *STI;
395 const TargetSubtargetInfo &STI, unsigned FunctionNum,
446 const TargetSubtargetInfo &getSubtarget() const { return *STI; }
447 void setSubtarget(const TargetSubtargetInfo *ST) { STI = ST; }
H A DTargetInstrInfo.h59 class TargetSubtargetInfo; variable
1262 CreateTargetHazardRecognizer(const TargetSubtargetInfo *STI,
1529 CreateTargetScheduleState(const TargetSubtargetInfo &) const { in CreateTargetScheduleState() argument
H A DBasicTTIImpl.h166 const TargetSubtargetInfo *getST() const { in getST()
450 const TargetSubtargetInfo *ST = getST(); in getUnrollingPreferences()
1542 const TargetSubtargetInfo *ST;
1545 const TargetSubtargetInfo *getST() const { return ST; } in getST()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DAMDGPUTargetMachine.h51 const TargetSubtargetInfo *getSubtargetImpl() const;
52 const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override = 0;
H A DAMDGPUMacroFusion.cpp30 const TargetSubtargetInfo &TSI, in shouldScheduleAdjacent()
H A DAMDGPUMCInstLower.cpp44 const TargetSubtargetInfo &ST;
51 AMDGPUMCInstLower(MCContext &ctx, const TargetSubtargetInfo &ST,
76 const TargetSubtargetInfo &st, in AMDGPUMCInstLower()
/freebsd-12.1/contrib/llvm/include/llvm/Target/
H A DTargetMachine.h45 class TargetSubtargetInfo; variable
111 virtual const TargetSubtargetInfo *getSubtargetImpl(const Function &) const { in getSubtargetImpl()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMMacroFusion.cpp53 const TargetSubtargetInfo &TSI, in shouldScheduleAdjacent()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64StorePairSuppress.cpp126 const TargetSubtargetInfo &ST = MF.getSubtarget(); in runOnMachineFunction()
H A DAArch64RegisterBankInfo.cpp267 const TargetSubtargetInfo &STI = MF.getSubtarget(); in getInstrAlternativeMappings()
457 const TargetSubtargetInfo &STI = MF.getSubtarget(); in getInstrMapping()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCSubtarget.cpp190 return TargetSubtargetInfo::ANTIDEP_ALL; in getAntiDepBreakMode()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86MacroFusion.cpp26 const TargetSubtargetInfo &TSI, in shouldScheduleAdjacent()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonMachineScheduler.h52 VLIWResourceModel(const TargetSubtargetInfo &STI, const TargetSchedModel *SM) in VLIWResourceModel()
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGVLIW.cpp75 const TargetSubtargetInfo &STI = mf.getSubtarget(); in ScheduleDAGVLIW()
/freebsd-12.1/contrib/llvm/lib/Target/NVPTX/
H A DNVPTXPrologEpilogPass.cpp52 const TargetSubtargetInfo &STI = MF.getSubtarget(); in runOnMachineFunction()
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZMachineScheduler.cpp134 const TargetSubtargetInfo *ST = &C->MF->getSubtarget(); in SystemZPostRASchedStrategy()

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