| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 45 class TargetRegisterClass {
354 const TargetRegisterClass *
359 const TargetRegisterClass *
551 virtual const TargetRegisterClass *
576 virtual const TargetRegisterClass *
669 const TargetRegisterClass*
710 const TargetRegisterClass *
719 virtual const TargetRegisterClass *
728 virtual const TargetRegisterClass *
737 virtual const TargetRegisterClass *
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| H A D | RegisterClassInfo.h | 71 void compute(const TargetRegisterClass *RC) const;
74 const RCInfo &get(const TargetRegisterClass *RC) const { in get()
90 unsigned getNumAllocatableRegs(const TargetRegisterClass *RC) const { in getNumAllocatableRegs()
97 ArrayRef<MCPhysReg> getOrder(const TargetRegisterClass *RC) const { in getOrder()
107 bool isProperSubClass(const TargetRegisterClass *RC) const { in isProperSubClass()
123 unsigned getMinCost(const TargetRegisterClass *RC) { in getMinCost()
131 unsigned getLastCostChange(const TargetRegisterClass *RC) { in getLastCostChange()
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| H A D | RegisterScavenging.h | 32 class TargetRegisterClass; variable
126 BitVector getRegsAvailable(const TargetRegisterClass *RC);
130 unsigned FindUnusedReg(const TargetRegisterClass *RC) const;
161 unsigned scavengeRegister(const TargetRegisterClass *RC,
163 unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) { in scavengeRegister()
173 unsigned scavengeRegisterBackwards(const TargetRegisterClass &RC,
220 ScavengedInfo &spill(unsigned Reg, const TargetRegisterClass &RC, int SPAdj,
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| H A D | LiveStacks.h | 28 class TargetRegisterClass; variable
43 std::map<int, const TargetRegisterClass *> S2RCMap;
62 LiveInterval &getOrCreateInterval(int Slot, const TargetRegisterClass *RC);
80 const TargetRegisterClass *getIntervalRegClass(int Slot) const { in getIntervalRegClass()
82 std::map<int, const TargetRegisterClass *>::const_iterator I = in getIntervalRegClass()
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| H A D | FastISel.h | 58 class TargetRegisterClass; variable
394 const TargetRegisterClass *RC);
399 const TargetRegisterClass *RC, unsigned Op0,
405 const TargetRegisterClass *RC, unsigned Op0,
411 const TargetRegisterClass *RC, unsigned Op0,
418 const TargetRegisterClass *RC, unsigned Op0,
424 const TargetRegisterClass *RC, unsigned Op0,
430 const TargetRegisterClass *RC,
436 const TargetRegisterClass *RC, unsigned Op0,
443 const TargetRegisterClass *RC, uint64_t Imm);
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.h | 102 const TargetRegisterClass *getPointerRegClass(
132 bool isSGPRClass(const TargetRegisterClass *RC) const { in isSGPRClass()
142 const TargetRegisterClass *RC; in isSGPRReg()
151 bool hasVGPRs(const TargetRegisterClass *RC) const;
154 const TargetRegisterClass *getEquivalentVGPRClass(
158 const TargetRegisterClass *getEquivalentSGPRClass(
164 const TargetRegisterClass *getSubRegClass(const TargetRegisterClass *RC,
210 const TargetRegisterClass *SrcRC,
212 const TargetRegisterClass *DstRC,
214 const TargetRegisterClass *NewRC,
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| H A D | SIFixSGPRCopies.cpp | 160 static std::pair<const TargetRegisterClass *, const TargetRegisterClass *>
167 const TargetRegisterClass *SrcRC = in getCopyRegClasses()
175 const TargetRegisterClass *DstRC = in getCopyRegClasses()
183 static bool isVGPRToSGPRCopy(const TargetRegisterClass *SrcRC, in isVGPRToSGPRCopy()
184 const TargetRegisterClass *DstRC, in isVGPRToSGPRCopy()
190 static bool isSGPRToVGPRCopy(const TargetRegisterClass *SrcRC, in isSGPRToVGPRCopy()
191 const TargetRegisterClass *DstRC, in isSGPRToVGPRCopy()
256 const TargetRegisterClass *SrcRC, *DstRC; in foldVGPRCopyIntoRegSequence()
286 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg); in foldVGPRCopyIntoRegSequence()
597 const TargetRegisterClass *SrcRC, *DstRC; in runOnMachineFunction()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.h | 65 const TargetRegisterClass *
66 getMatchingSuperRegClass(const TargetRegisterClass *A,
67 const TargetRegisterClass *B,
70 const TargetRegisterClass *
71 getSubClassWithSubReg(const TargetRegisterClass *RC,
74 const TargetRegisterClass *
75 getLargestLegalSuperClass(const TargetRegisterClass *RC,
80 const TargetRegisterClass *
87 const TargetRegisterClass *
92 const TargetRegisterClass *
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| H A D | X86RegisterInfo.cpp | 87 const TargetRegisterClass *
88 X86RegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, in getSubClassWithSubReg()
99 const TargetRegisterClass *
100 X86RegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A, in getMatchingSuperRegClass()
112 const TargetRegisterClass *
128 const TargetRegisterClass *Super = RC; in getLargestLegalSuperClass()
129 TargetRegisterClass::sc_iterator I = RC->getSuperClasses(); in getLargestLegalSuperClass()
178 const TargetRegisterClass *
219 const TargetRegisterClass *
233 const TargetRegisterClass *
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | TargetRegisterInfo.cpp | 174 const TargetRegisterClass *
191 const TargetRegisterClass *
197 const TargetRegisterClass* BestRC = nullptr; in getMinimalPhysRegClass()
227 for (const TargetRegisterClass *C : regclasses()) in getAllocatableSet()
248 const TargetRegisterClass *RC = in firstCommonClass()
256 const TargetRegisterClass *
271 const TargetRegisterClass *
287 const TargetRegisterClass *TargetRegisterInfo::
305 const TargetRegisterClass *BestRC = nullptr; in getCommonSuperRegClass()
322 const TargetRegisterClass *RC = in getCommonSuperRegClass()
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| H A D | CriticalAntiDepBreaker.cpp | 77 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in StartBlock()
95 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in StartBlock()
125 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in Observe()
132 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in Observe()
193 const TargetRegisterClass *NewRC = nullptr; in PrescanInstruction()
203 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in PrescanInstruction()
213 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in PrescanInstruction()
311 const TargetRegisterClass *NewRC = nullptr; in ScanInstruction()
320 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in ScanInstruction()
396 const TargetRegisterClass *RC, in findSuitableFreeRegister()
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| H A D | MachineRegisterInfo.cpp | 69 static const TargetRegisterClass *
71 const TargetRegisterClass *OldRC, in constrainRegClass()
75 const TargetRegisterClass *NewRC = in constrainRegClass()
85 const TargetRegisterClass *
106 else if (RegCB.is<const TargetRegisterClass *>() != in constrainRegAttrs()
107 ConstrainingRegCB.is<const TargetRegisterClass *>()) in constrainRegAttrs()
109 else if (RegCB.is<const TargetRegisterClass *>()) { in constrainRegAttrs()
111 *this, Reg, RegCB.get<const TargetRegisterClass *>(), in constrainRegAttrs()
125 const TargetRegisterClass *OldRC = getRegClass(Reg); in recomputeRegClass()
126 const TargetRegisterClass *NewRC = in recomputeRegClass()
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| H A D | RegisterCoalescer.h | 21 class TargetRegisterClass; variable
56 const TargetRegisterClass *NewRC = nullptr;
108 const TargetRegisterClass *getNewRC() const { return NewRC; } in getNewRC()
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.h | 64 bool shouldCoalesce(MachineInstr *MI, const TargetRegisterClass *SrcRC,
65 unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg,
66 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const override;
74 unsigned getHexagonSubRegIndex(const TargetRegisterClass &RC,
78 const TargetRegisterClass *RC) const;
82 const TargetRegisterClass *
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| H A D | HexagonVLIWPacketizer.h | 26 class TargetRegisterClass; variable
115 const TargetRegisterClass *RC);
118 const TargetRegisterClass *RC);
123 const TargetRegisterClass *RC);
126 const TargetRegisterClass *RC);
138 bool isNewifiable(const MachineInstr &MI, const TargetRegisterClass *NewRC);
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| /freebsd-12.1/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.h | 41 const TargetRegisterClass *
50 const TargetRegisterClass *
51 getCrossCopyRegClass(const TargetRegisterClass *RC) const override;
80 const TargetRegisterClass *SrcRC,
82 const TargetRegisterClass *DstRC,
84 const TargetRegisterClass *NewRC,
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.h | 24 class TargetRegisterClass; variable
60 const TargetRegisterClass *
61 getSubClassWithSubReg(const TargetRegisterClass *RC,
89 const TargetRegisterClass *
92 const TargetRegisterClass *
93 getCrossCopyRegClass(const TargetRegisterClass *RC) const override;
119 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.h | 137 const TargetRegisterClass *
140 const TargetRegisterClass *
141 getCrossCopyRegClass(const TargetRegisterClass *RC) const override;
143 const TargetRegisterClass *
144 getLargestLegalSuperClass(const TargetRegisterClass *RC,
147 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
207 const TargetRegisterClass *SrcRC,
209 const TargetRegisterClass *DstRC,
211 const TargetRegisterClass *NewRC,
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| H A D | ThumbRegisterInfo.h | 30 const TargetRegisterClass *
31 getLargestLegalSuperClass(const TargetRegisterClass *RC,
34 const TargetRegisterClass *
58 const TargetRegisterClass *RC,
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| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsRegisterInfo.h | 26 class TargetRegisterClass; variable
48 const TargetRegisterClass *getPointerRegClass(const MachineFunction &MF,
51 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
76 virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0;
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| H A D | MipsMachineFunction.cpp | 32 static const TargetRegisterClass &getGlobalBaseRegClass(MachineFunction &MF) { in getGlobalBaseRegClass()
58 const TargetRegisterClass &RC = in createEhDataRegsFI()
73 const TargetRegisterClass &RC = Mips::GPR32RegClass; in createISRRegFI()
97 int MipsFunctionInfo::getMoveF64ViaSpillFI(const TargetRegisterClass *RC) { in getMoveF64ViaSpillFI()
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| H A D | MipsInstrInfo.h | 39 class TargetRegisterClass; variable
116 const TargetRegisterClass *RC, in storeRegToStackSlot()
124 const TargetRegisterClass *RC, in loadRegFromStackSlot()
132 const TargetRegisterClass *RC,
139 const TargetRegisterClass *RC,
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/GlobalISel/ |
| H A D | RegisterBank.cpp | 34 const TargetRegisterClass &RC = *TRI.getRegClass(RCId); in verify()
45 const TargetRegisterClass &SubRC = *TRI.getRegClass(RCId); in verify()
60 bool RegisterBank::covers(const TargetRegisterClass &RC) const { in covers()
104 const TargetRegisterClass &RC = *TRI->getRegClass(RCId); in print()
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 122 int FrameIdx, const TargetRegisterClass *RC,
126 const TargetRegisterClass *RC,
294 const TargetRegisterClass *RC,
300 const TargetRegisterClass *RC,
304 const TargetRegisterClass *RC = nullptr) const;
307 const TargetRegisterClass *RC = nullptr) const;
393 const TargetRegisterClass *updatedRC(const TargetRegisterClass *RC) const;
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| /freebsd-12.1/contrib/llvm/lib/Target/AVR/ |
| H A D | AVRRegisterInfo.h | 36 const TargetRegisterClass *
37 getLargestLegalSuperClass(const TargetRegisterClass *RC,
47 const TargetRegisterClass *
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