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Searched refs:Subreg (Results 1 – 5 of 5) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DThumb2ITBlockPass.cpp100 for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true); in TrackDefUses() local
101 Subreg.isValid(); ++Subreg) in TrackDefUses()
102 Uses.insert(*Subreg); in TrackDefUses()
107 for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true); in TrackDefUses() local
108 Subreg.isValid(); ++Subreg) in TrackDefUses()
109 Defs.insert(*Subreg); in TrackDefUses()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCReduceCRLogicals.cpp386 MachineInstr *lookThroughCRCopy(unsigned Reg, unsigned &Subreg,
511 unsigned &Subreg, in lookThroughCRCopy() argument
513 Subreg = -1; in lookThroughCRCopy()
521 Subreg = Copy->getOperand(1).getSubReg(); in lookThroughCRCopy()
526 Subreg = PPC::sub_eq; in lookThroughCRCopy()
528 Subreg = PPC::sub_lt; in lookThroughCRCopy()
530 Subreg = PPC::sub_gt; in lookThroughCRCopy()
532 Subreg = PPC::sub_un; in lookThroughCRCopy()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h1238 SDValue Operand, SDValue Subreg);
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp7824 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, in getTargetExtractSubreg() local
7826 return SDValue(Subreg, 0); in getTargetExtractSubreg()
7832 SDValue Operand, SDValue Subreg) { in getTargetInsertSubreg() argument
7835 VT, Operand, Subreg, SRIdxVal); in getTargetInsertSubreg()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86InstrAVX512.td1253 RegisterClass SrcRC, SubRegIndex Subreg> {
1264 (i32 (INSERT_SUBREG (i32 (IMPLICIT_DEF)), SrcRC:$src, Subreg)))>;
1268 (i32 (INSERT_SUBREG (i32 (IMPLICIT_DEF)), SrcRC:$src, Subreg)))>;
1272 (i32 (INSERT_SUBREG (i32 (IMPLICIT_DEF)), SrcRC:$src, Subreg)))>;
1277 RegisterClass SrcRC, SubRegIndex Subreg, Predicate prd> {
1280 OpNode, SrcRC, Subreg>, EVEX_V512;
1283 _.info256, OpNode, SrcRC, Subreg>, EVEX_V256;
1285 _.info128, OpNode, SrcRC, Subreg>, EVEX_V128;