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Searched refs:SpillAlignment (Results 1 – 6 of 6) sorted by relevance

/freebsd-12.1/contrib/llvm/utils/TableGen/
H A DInfoByHwMode.cpp121 SpillAlignment = R->getValueAsInt("SpillAlignment"); in RegSizeInfo()
125 return std::tie(RegSize, SpillSize, SpillAlignment) < in operator <()
126 std::tie(I.RegSize, I.SpillSize, I.SpillAlignment); in operator <()
131 SpillAlignment && I.SpillAlignment % SpillAlignment == 0 && in isSubClassOf()
137 << ",A=" << SpillAlignment << ']'; in writeToStream()
170 return std::tie(A0.SpillSize, A0.SpillAlignment) > in hasStricterSpillThan()
171 std::tie(B0.SpillSize, B0.SpillAlignment); in hasStricterSpillThan()
H A DInfoByHwMode.h146 unsigned SpillAlignment; member
152 return std::tie(RegSize, SpillSize, SpillAlignment) ==
153 std::tie(I.RegSize, I.SpillSize, I.SpillAlignment);
H A DRegisterInfoEmitter.cpp1284 << RI.SpillAlignment; in runTargetDesc()
1633 OS << ' ' << getModeName(M) << ':' << RC.RSI.get(M).SpillAlignment; in debugDump()
H A DCodeGenRegisters.cpp792 RI.SpillAlignment = R->getValueAsInt("Alignment"); in CodeGenRegisterClass()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h225 unsigned RegSize, SpillSize, SpillAlignment; member
327 return getRegClassInfo(RC).SpillAlignment / 8; in getSpillAlignment()
/freebsd-12.1/contrib/llvm/include/llvm/Target/
H A DTarget.td64 int SpillAlignment = SA; // Spill slot alignment in bits.