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Searched refs:SmallVT (Results 1 – 5 of 5) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp418 EVT SmallVT = EVT::getIntegerVT(*DAG.getContext(), SmallVTBits); in ShrinkDemandedOp() local
419 if (TLI.isTruncateFree(Op.getValueType(), SmallVT) && in ShrinkDemandedOp()
420 TLI.isZExtFree(SmallVT, Op.getValueType())) { in ShrinkDemandedOp()
423 Op.getOpcode(), dl, SmallVT, in ShrinkDemandedOp()
424 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(0)), in ShrinkDemandedOp()
425 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(1))); in ShrinkDemandedOp()
H A DLegalizeIntegerTypes.cpp927 EVT SmallVT = LHS.getValueType(); in PromoteIntRes_XMULO() local
950 DAG.getIntPtrConstant(SmallVT.getSizeInBits(), in PromoteIntRes_XMULO()
958 Mul, DAG.getValueType(SmallVT)); in PromoteIntRes_XMULO()
H A DDAGCombiner.cpp6950 EVT SmallVT = N0.getOperand(0).getValueType(); in visitSRL() local
6951 unsigned BitSize = SmallVT.getScalarSizeInBits(); in visitSRL()
6955 if (!LegalTypes || TLI.isTypeDesirableForOp(ISD::SRL, SmallVT)) { in visitSRL()
6958 SDValue SmallShift = DAG.getNode(ISD::SRL, DL0, SmallVT, in visitSRL()
6961 getShiftAmountTy(SmallVT))); in visitSRL()
17130 EVT SmallVT = V.getOperand(1).getValueType(); in visitEXTRACT_SUBVECTOR() local
17131 if (!NVT.bitsEq(SmallVT)) in visitEXTRACT_SUBVECTOR()
17144 if (InsIdx->getZExtValue() * SmallVT.getScalarSizeInBits() == in visitEXTRACT_SUBVECTOR()
H A DSelectionDAGBuilder.cpp8037 EVT SmallVT = EVT::getIntegerVT(*DAG.getContext(), Bits); in lowerRangeToAssertZExt() local
8042 DAG.getValueType(SmallVT)); in lowerRangeToAssertZExt()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp3923 EVT SmallVT = EVT::getIntegerVT(*DAG.getContext(), WidthVal); in PerformDAGCombine() local
3932 DAG.getValueType(SmallVT)); in PerformDAGCombine()
3935 return DAG.getZeroExtendInReg(BitsFrom, DL, SmallVT); in PerformDAGCombine()