| /freebsd-12.1/contrib/llvm/lib/Transforms/Utils/ |
| H A D | VNCoercion.cpp | 446 T *ShVal = Helper.CreateShl( in getMemInstValueForLoadHelper() local
448 Val = Helper.CreateOr(Val, ShVal); in getMemInstValueForLoadHelper()
454 T *ShVal = Helper.CreateShl(Val, ConstantInt::get(Val->getType(), 1 * 8)); in getMemInstValueForLoadHelper() local
455 Val = Helper.CreateOr(OneElt, ShVal); in getMemInstValueForLoadHelper()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | IntrinsicLowering.cpp | 305 Value *ShVal = ConstantInt::get(V->getType(), i); in LowerCTLZ() local
306 ShVal = Builder.CreateLShr(V, ShVal, "ctlz.sh"); in LowerCTLZ()
307 V = Builder.CreateOr(V, ShVal, "ctlz.step"); in LowerCTLZ()
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonLoopIdiomRecognition.cpp | 1421 Value *ShAmt = CIV, *ShVal = Op; in convertShiftsToLeft() local
1422 auto *VTy = cast<IntegerType>(ShVal->getType()); in convertShiftsToLeft()
1425 ShVal = IRB.CreateShl(Op, ConstantInt::get(VTy, 1)); in convertShiftsToLeft()
1430 ShVal = upcast(CastMap, IRB, ShVal, ATy); in convertShiftsToLeft()
1435 W = IRB.CreateShl(ShVal, ShAmt); in convertShiftsToLeft()
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| /freebsd-12.1/contrib/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCasts.cpp | 514 Value *ShVal, *ShAmt0, *ShAmt1; in narrowRotate() local
515 if (!match(Or0, m_OneUse(m_LogicalShift(m_Value(ShVal), m_Value(ShAmt0)))) || in narrowRotate()
516 !match(Or1, m_OneUse(m_LogicalShift(m_Specific(ShVal), m_Value(ShAmt1))))) in narrowRotate()
561 if (!MaskedValueIsZero(ShVal, HiBitMask, 0, &Trunc)) in narrowRotate()
569 Value *X = Builder.CreateTrunc(ShVal, DestTy); in narrowRotate()
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| H A D | InstCombineAndOrXor.cpp | 1824 Value *ShVal, *ShAmt0, *ShAmt1; in matchRotate() local
1825 if (!match(Or0, m_OneUse(m_LogicalShift(m_Value(ShVal), m_Value(ShAmt0)))) || in matchRotate()
1826 !match(Or1, m_OneUse(m_LogicalShift(m_Specific(ShVal), m_Value(ShAmt1))))) in matchRotate()
1861 return IntrinsicInst::Create(F, { ShVal, ShVal, ShAmt }); in matchRotate()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 1622 SDValue ShVal = N.getOperand(0); in matchAddressRecursively() local
1627 if (CurDAG->isBaseWithConstantOffset(ShVal)) { in matchAddressRecursively()
1628 AM.IndexReg = ShVal.getOperand(0); in matchAddressRecursively()
1629 ConstantSDNode *AddVal = cast<ConstantSDNode>(ShVal.getOperand(1)); in matchAddressRecursively()
1635 AM.IndexReg = ShVal; in matchAddressRecursively()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstructionSelector.cpp | 1768 unsigned ShVal = AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt); in selectArithImmed() local
1771 [=](MachineInstrBuilder &MIB) { MIB.addImm(ShVal); }, in selectArithImmed()
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| H A D | AArch64ISelDAGToDAG.cpp | 283 unsigned ShVal = AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt); in SelectArithImmed() local
286 Shift = CurDAG->getTargetConstant(ShVal, dl, MVT::i32); in SelectArithImmed()
404 unsigned ShVal = AArch64_AM::getShifterImm(ShType, Val); in SelectShiftedRegister() local
407 Shift = CurDAG->getTargetConstant(ShVal, SDLoc(N), MVT::i32); in SelectShiftedRegister()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 1206 uint64_t ShVal = ShAmt->getZExtValue(); in SimplifyDemandedBits() local
1207 Shift = TLO.DAG.getConstant(ShVal, dl, getShiftAmountTy(VT, DL)); in SimplifyDemandedBits()
1294 unsigned ShVal = Op.getValueSizeInBits() - 1; in SimplifyDemandedBits() local
1295 SDValue ShAmt = TLO.DAG.getConstant(ShVal, dl, VT); in SimplifyDemandedBits()
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