Searched refs:SelectCC (Results 1 – 3 of 3) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1869 SDValue SelectCC = FNeg.getOperand(0); in PerformDAGCombine() local
1870 if (SelectCC.getOpcode() != ISD::SELECT_CC || in PerformDAGCombine()
1871 SelectCC.getOperand(0).getValueType() != MVT::f32 || // LHS in PerformDAGCombine()
1872 SelectCC.getOperand(2).getValueType() != MVT::f32 || // True in PerformDAGCombine()
1873 !isHWTrueValue(SelectCC.getOperand(2)) || in PerformDAGCombine()
1874 !isHWFalseValue(SelectCC.getOperand(3))) { in PerformDAGCombine()
1879 SelectCC.getOperand(0), // LHS in PerformDAGCombine()
1880 SelectCC.getOperand(1), // RHS in PerformDAGCombine()
1883 SelectCC.getOperand(4)); // CC in PerformDAGCombine()
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| /freebsd-12.1/contrib/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.td | 45 def SelectCC : SDNode<"RISCVISD::SELECT_CC", SDT_RISCVSelectCC,
749 [(set valty:$dst, (SelectCC cmpty:$lhs, cmpty:$rhs,
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 219 SDValue SelectCC(SDValue LHS, SDValue RHS, ISD::CondCode CC,
3650 SDValue PPCDAGToDAGISel::SelectCC(SDValue LHS, SDValue RHS, ISD::CondCode CC, in SelectCC() function in PPCDAGToDAGISel
4103 SDValue CCReg = SelectCC(LHS, RHS, CC, dl); in trySETCC()
4796 SelectCC(LHS, RHS, IsUnCmp ? ISD::SETUGT : ISD::SETGT, dl); in Select()
4822 SDValue CCReg = SelectCC(N->getOperand(0), N->getOperand(1), CC, dl); in Select()
5012 SDValue CondCode = SelectCC(N->getOperand(2), N->getOperand(3), CC, dl); in Select()
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