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Searched refs:SImode (Results 1 – 25 of 70) sorted by relevance

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/freebsd-12.1/contrib/gcc/config/
H A Dgofast.h73 set_conv_libfunc (sfix_optab, SImode, SFmode, "fptosi"); in gofast_maybe_init_libfuncs()
74 set_conv_libfunc (sfix_optab, SImode, DFmode, "dptoli"); in gofast_maybe_init_libfuncs()
75 set_conv_libfunc (ufix_optab, SImode, SFmode, "fptoui"); in gofast_maybe_init_libfuncs()
76 set_conv_libfunc (ufix_optab, SImode, DFmode, "dptoul"); in gofast_maybe_init_libfuncs()
78 set_conv_libfunc (sfloat_optab, SFmode, SImode, "sitofp"); in gofast_maybe_init_libfuncs()
79 set_conv_libfunc (sfloat_optab, DFmode, SImode, "litodp"); in gofast_maybe_init_libfuncs()
/freebsd-12.1/contrib/gcc/config/sparc/
H A Dsparc.c1039 case SImode: in sparc_expand_move()
2312 case SImode: in emit_soft_tfmode_cvt()
2326 case SImode: in emit_soft_tfmode_cvt()
2340 case SImode: in emit_soft_tfmode_cvt()
2354 case SImode: in emit_soft_tfmode_cvt()
3072 temp1 = gen_reg_rtx (SImode); in legitimize_tls_address()
6086 SImode, 2, in sparc_emit_float_lib_cmp()
6089 mode = SImode; in sparc_emit_float_lib_cmp()
8868 if (Pmode != SImode) in sparc_expand_compare_and_swap_12()
8896 gen_rtx_AND (SImode, gen_rtx_NOT (SImode, mask), in sparc_expand_compare_and_swap_12()
[all …]
H A Dsparc.md2670 half_mode = SImode;
2709 half_mode = SImode;
2744 half_mode = SImode;
2771 half_mode = SImode;
2801 half_mode = SImode;
3496 rtx temp = gen_reg_rtx (SImode);
3776 rtx temp = gen_reg_rtx (SImode);
3807 rtx temp = gen_reg_rtx (SImode);
3828 if (GET_MODE (operand0) != SImode)
3847 rtx temp = gen_reg_rtx (SImode);
[all …]
H A Dsparc.h1074 && (FROM) == SImode \
1235 & ((unsigned HOST_WIDE_INT) 0x3ff - GET_MODE_MASK (SImode) - 1)) == 0)
1239 (SPARC_SETHI_P ((unsigned HOST_WIDE_INT) (X) & GET_MODE_MASK (SImode)))
2035 && GET_MODE (X) == SImode \
2058 (! TARGET_PTR64 ? SImode : flag_pic ? SImode : TARGET_CM_MEDLOW ? SImode : DImode)
2063 (! TARGET_PTR64 ? SImode : flag_pic ? DImode : TARGET_CM_MEDLOW ? SImode : DImode)
2103 #define Pmode (TARGET_ARCH64 ? DImode : SImode)
2273 if (CASE_VECTOR_MODE == SImode) \
2288 if (CASE_VECTOR_MODE == SImode) \
H A Dpredicates.md222 (ior (match_test "register_operand (op, SImode)")
306 m1 = trunc_int_for_mode (INTVAL (op), SImode);
307 m2 = trunc_int_for_mode (INTVAL (op) >> 32, SImode);
331 ;; signed 10-bit immediate field. This is an acceptable SImode operand for
339 ;; signed 11-bit immediate field. This is an acceptable SImode operand for
363 && ((mode == SImode
H A Dsysv4.h88 do { ASM_OUTPUT_ALIGN ((FILE), Pmode == SImode ? 2 : 3); \
H A Dsync.md99 "TARGET_V9 && (<MODE>mode == SImode || TARGET_ARCH64)"
161 operands[2] = force_reg (SImode, operands[2]);
/freebsd-12.1/contrib/gcc/config/arm/
H A Darm.c3962 addend = force_reg (SImode, gen_rtx_CONST (SImode, addend)); in legitimize_tls_address()
3993 reg = force_reg (SImode, gen_rtx_CONST (SImode, reg)); in legitimize_tls_address()
4388 case SImode: in thumb_rtx_costs()
4429 if (mode != SImode) in arm_rtx_costs_1()
4598 case SImode: in arm_rtx_costs_1()
4712 if (mode == SImode) in arm_size_rtx_costs()
4744 if (mode == SImode) in arm_size_rtx_costs()
4816 case SImode: in arm_size_rtx_costs()
6935 gen_rtx_IOR (SImode, in arm_reload_in_hi()
6937 (SImode, in arm_reload_in_hi()
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H A Darm.md1889 < GET_MODE_SIZE (SImode))
1902 rtx op1 = gen_reg_rtx (SImode);
1923 rtx op0 = gen_reg_rtx (SImode);
5213 ;; an SImode operation.
8155 reg = gen_reg_rtx (SImode);
10167 t1 = gen_reg_rtx (SImode);
10168 t2 = gen_reg_rtx (SImode);
10169 t3 = gen_reg_rtx (SImode);
10187 t1 = gen_reg_rtx (SImode);
10188 t2 = gen_reg_rtx (SImode);
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H A Dvfp.md120 ;; SImode moves
127 && ( s_register_operand (operands[0], SImode)
128 || s_register_operand (operands[1], SImode))"
341 operands[0] = gen_highpart (SImode, operands[0]);
342 operands[1] = gen_rtx_XOR (SImode, operands[0], GEN_INT (0x80000000));
348 in_hi = gen_rtx_XOR (SImode, gen_highpart (SImode, operands[1]),
350 in_lo = gen_lowpart (SImode, operands[1]);
351 out_hi = gen_highpart (SImode, operands[0]);
352 out_lo = gen_lowpart (SImode, operands[0]);
356 emit_insn (gen_rtx_SET (SImode, out_lo, in_lo));
[all …]
H A Darm.h408 (MODE) = SImode; \
415 (MODE) = SImode; \
804 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, ARM_EH_STACKADJ_REGNUM)
1052 (((MODE) == SImode) ? BASE_REGS : LO_REGS))
1150 else if (MODE == SImode \
1693 emit_move_insn (gen_rtx_MEM (SImode, \
1697 emit_move_insn (gen_rtx_MEM (SImode, \
2083 #define Pmode SImode
H A Dlinux-elf.h103 emit_insn (gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, LR_REGNUM)))
H A Dpredicates.md315 || GET_MODE (SET_DEST (elt)) != SImode
318 || GET_MODE (SET_SRC (elt)) != SImode
372 || GET_MODE (SET_SRC (elt)) != SImode
375 || GET_MODE (SET_DEST (elt)) != SImode
/freebsd-12.1/contrib/gcc/config/s390/
H A Ds390.c734 && GET_MODE (*op0) == SImode in s390_canonicalize_comparison()
1216 wmode = SImode; in s390_expand_logical_operator()
1700 || (GET_MODE (indx) != SImode in s390_decompose_address()
2048 part_mode = SImode; in s390_N_constraint_str()
2060 mode = SImode; in s390_N_constraint_str()
2160 case SImode: in s390_rtx_costs()
3838 cmp_mode = SImode; in s390_expand_addcc()
4064 putmode = SImode; in s390_expand_insv()
4202 cmpv = force_reg (SImode, expand_simple_binop (SImode, IOR, cmp, val, in s390_expand_cs_hqi()
4210 newv = force_reg (SImode, expand_simple_binop (SImode, IOR, new, val, in s390_expand_cs_hqi()
[all …]
H A Ds390.md292 ;; in "RRE" for DImode and "RR" for SImode.
304 ;; and "lcr" in SImode.
318 ;; and "cfdbr" in SImode.
322 ;; of a SImode register.
330 ;; in SImode.
1301 rtx tmp = gen_reg_rtx (SImode);
2776 rtx tmp = gen_reg_rtx (SImode);
2972 rtx tmp = gen_reg_rtx (SImode);
4354 PUT_MODE (operands[1], SImode);
6983 rtx index = gen_reg_rtx (SImode);
[all …]
/freebsd-12.1/contrib/gcc/config/rs6000/
H A Drs6000.c2614 && mode == SImode in invalid_e500_subreg()
3798 case SImode: in rs6000_emit_set_const()
4120 case SImode: in rs6000_emit_move()
9099 case SImode: in rs6000_common_init_builtins()
9161 else if (mode0 == V2SImode && mode1 == SImode && mode2 == SImode) in rs6000_common_init_builtins()
9401 mode = SImode; in expand_block_clear()
9536 mode = SImode; in expand_block_move()
12222 addrSI = force_reg (SImode, gen_lowpart_common (SImode, in rs6000_emit_sync()
12395 if (mode == SImode) in emit_load_locked()
12409 if (mode == SImode) in emit_store_conditional()
[all …]
H A Dpredicates.md164 + (mode == SImode
266 case SImode:
845 || GET_MODE (SET_DEST (elt)) != SImode
848 || GET_MODE (SET_SRC (elt)) != SImode
885 || GET_MODE (SET_SRC (elt)) != SImode
888 || GET_MODE (SET_DEST (elt)) != SImode
1098 || GET_MODE (SET_DEST (exp)) != SImode
1132 || GET_MODE (src_reg) != SImode
1210 || GET_MODE (SET_DEST (elt)) != SImode
1213 || GET_MODE (SET_SRC (elt)) != SImode)
[all …]
H A Dsync.md165 if (<MODE>mode != SImode && <MODE>mode != DImode)
222 if (<MODE>mode != SImode && <MODE>mode != DImode)
265 if (<MODE>mode != SImode && <MODE>mode != DImode)
328 if (<MODE>mode != SImode && <MODE>mode != DImode)
374 if (<MODE>mode != SImode && <MODE>mode != DImode)
440 if (<MODE>mode != SImode && <MODE>mode != DImode)
H A Drs6000.md1382 word1 = gen_reg_rtx (SImode);
1383 word2 = gen_reg_rtx (SImode);
2152 <MODE>mode == SImode
5800 operands[0] = assign_stack_temp (SImode, GET_MODE_SIZE (SImode), 0);
6116 gen_rtx_REG (SImode, 3));
10465 gen_rtx_MEM (SImode,
10494 force_reg (SImode,
11495 SImode,
13674 SImode,
13683 SImode,
[all …]
/freebsd-12.1/contrib/gcc/
H A Dloop-iv.c1577 || GET_MODE (cond) != SImode) in canon_condition()
1578 cond = gen_rtx_fmt_ee (code, SImode, op0, op1); in canon_condition()
2237 may_xform = simplify_gen_relational (cond, SImode, mode, in iv_number_of_iterations()
2240 SImode, mode, in iv_number_of_iterations()
2249 may_xform = simplify_gen_relational (cond, SImode, mode, in iv_number_of_iterations()
2252 SImode, mode, in iv_number_of_iterations()
2302 SImode, mode, tmp0, tmp1); in iv_number_of_iterations()
2376 SImode, mode, in iv_number_of_iterations()
2397 SImode, mode, tmp0, tmp); in iv_number_of_iterations()
2420 SImode, mode, in iv_number_of_iterations()
[all …]
H A Dcfgloopanal.c517 rtx reg1 = gen_raw_REG (SImode, FIRST_PSEUDO_REGISTER); in init_set_costs()
518 rtx reg2 = gen_raw_REG (SImode, FIRST_PSEUDO_REGISTER + 1); in init_set_costs()
520 rtx mem = validize_mem (gen_rtx_MEM (SImode, addr)); in init_set_costs()
/freebsd-12.1/contrib/gcc/config/i386/
H A Di386.c3486 case SImode: in classify_argument()
3840 case SImode: in function_arg_advance()
3962 case SImode: in function_arg()
8201 case SImode: in print_operand()
10743 case SImode: in ix86_expand_branch()
12149 case SImode: in ix86_expand_int_addcc()
12169 case SImode: in ix86_expand_int_addcc()
17247 case SImode: in ix86_force_to_memory()
17289 case SImode: in ix86_force_to_memory()
17642 case SImode: in ix86_tieable_integer_mode_p()
[all …]
H A Dpredicates.md69 && GET_MODE (op) != SImode && GET_MODE (op) != HImode)
106 return trunc_int_for_mode (val, SImode) == val;
166 && trunc_int_for_mode (offset, SImode) == offset)
174 && trunc_int_for_mode (offset, SImode) == offset)
183 && trunc_int_for_mode (offset, SImode) == offset)
187 && trunc_int_for_mode (offset, SImode) == offset)
197 && trunc_int_for_mode (offset, SImode) == offset)
271 && trunc_int_for_mode (INTVAL (op2), SImode) == INTVAL (op2))
285 && trunc_int_for_mode (INTVAL (op2), SImode) == INTVAL (op2))
962 ;; Modern CPUs have same latency for HImode and SImode multiply,
H A Di386.h927 || (MODE) == V2SImode || (MODE) == SImode)
938 ((MODE) == QImode || (MODE) == HImode || (MODE) == SImode \
976 : (MODE) == HImode && !TARGET_PARTIAL_REG_STALL ? SImode \
977 : (MODE) == QImode && (REGNO) >= 4 && !TARGET_64BIT ? SImode \
1785 #define CASE_VECTOR_MODE (!TARGET_64BIT || flag_pic ? SImode : DImode)
1843 (MODE) = SImode; \
1849 #define Pmode (TARGET_64BIT ? DImode : SImode)
H A Di386.md4113 ;; Signed conversion to SImode.
5018 if (Pmode != SImode)
5068 if (Pmode != SImode)
5121 if (Pmode != SImode)
5489 if (Pmode != SImode)
10736 if (Pmode != SImode)
14487 if (Pmode == SImode)
15237 ;; SImode if the target mode DFmode, but only SImode if the target mode
18843 out = gen_reg_rtx (SImode);
19762 gen_rtx_MINUS (SImode,
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