| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | VOP2Instructions.td | 704 VOP2_Real<!cast<VOP2_Pseudo>(NAME), SIEncodingFamily.SI>,
709 def _si : VOP2_Real<!cast<VOP2_Pseudo>(NAME), SIEncodingFamily.SI>,
715 VOP2_Real<!cast<VOP2_Pseudo>(NAME#"_e32"), SIEncodingFamily.SI>,
721 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>,
727 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>,
809 def _vi : VOP2_Real<!cast<VOP2_Pseudo>(NAME), SIEncodingFamily.VI>,
815 VOP2_Real<!cast<VOP2_Pseudo>(NAME#"_e32"), SIEncodingFamily.VI>,
821 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.VI>,
827 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.VI>,
858 VOP2_Real<!cast<VOP2_Pseudo>(OpName#"_e32"), SIEncodingFamily.VI>,
[all …]
|
| H A D | VOP3Instructions.td | 645 def _si : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.SI>,
650 def _si : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.SI>,
714 def _ci : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.SI>,
722 def _ci : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.SI>,
741 def _vi : VOP3_Real<!cast<VOP_Pseudo>(NAME), SIEncodingFamily.VI>,
746 def _vi : VOP3_Real<!cast<VOP_Pseudo>(NAME), SIEncodingFamily.VI>,
751 def _vi : VOP3_Real<!cast<VOP_Pseudo>(NAME), SIEncodingFamily.VI>,
756 def _vi : VOP3_Real<!cast<VOP_Pseudo>(NAME), SIEncodingFamily.VI>,
765 def _vi : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.VI>,
770 def _vi : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.VI>,
[all …]
|
| H A D | VOP1Instructions.td | 423 VOP1_Real<!cast<VOP1_Pseudo>(NAME#"_e32"), SIEncodingFamily.SI>,
426 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>,
498 VOP1_Real<!cast<VOP1_Pseudo>(NAME#"_e32"), SIEncodingFamily.SI>,
501 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>,
529 VOP1_Real<!cast<VOP1_Pseudo>(NAME), SIEncodingFamily.VI>,
537 VOP1_Real<!cast<VOP1_Pseudo>(NAME#"_e32"), SIEncodingFamily.VI>,
540 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.VI>,
558 VOP_DPP_Real<!cast<VOP1_DPP_Pseudo>(NAME#"_dpp"), SIEncodingFamily.VI>,
732 VOP_DPP_Real<!cast<VOP1_DPP_Pseudo>(NAME#"_dpp"), SIEncodingFamily.GFX9>,
|
| H A D | SIInstrInfo.td | 26 // SIEncodingFamily enum in AMDGPUInstrInfo.cpp
27 def SIEncodingFamily {
1874 SIMCInstr<opName, SIEncodingFamily.NONE> {
1883 SIMCInstr<opName, SIEncodingFamily.SI> {
1893 SIMCInstr<opName, SIEncodingFamily.VI> {
1979 let KeyCol = [!cast<string>(SIEncodingFamily.NONE)];
1980 let ValueCols = [[!cast<string>(SIEncodingFamily.SI)],
1981 [!cast<string>(SIEncodingFamily.VI)],
1982 [!cast<string>(SIEncodingFamily.SDWA)],
1983 [!cast<string>(SIEncodingFamily.SDWA9)],
[all …]
|
| H A D | VOPInstructions.td | 45 SIMCInstr <opName#suffix, SIEncodingFamily.NONE>,
403 SIMCInstr <opName#"_sdwa", SIEncodingFamily.NONE>,
434 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.SDWA> {
461 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.SDWA9> {
511 SIMCInstr <OpName#"_dpp", SIEncodingFamily.NONE>,
|
| H A D | SMInstructions.td | 26 SIMCInstr<opName, SIEncodingFamily.NONE> {
387 , SIMCInstr<ps.PseudoInstr, SIEncodingFamily.SI>
440 , SIMCInstr<ps.PseudoInstr, SIEncodingFamily.VI>
667 , SIMCInstr<ps.PseudoInstr, SIEncodingFamily.SI>
|
| H A D | BUFInstructions.td | 75 SIMCInstr<opName, SIEncodingFamily.NONE> {
298 SIMCInstr<opName, SIEncodingFamily.NONE> {
1647 SIMCInstr<ps.PseudoInstr, SIEncodingFamily.SI> {
1774 SIMCInstr<ps.PseudoInstr, SIEncodingFamily.SI> {
1833 SIMCInstr<ps.PseudoInstr, SIEncodingFamily.VI> {
1883 SIMCInstr<ps.PseudoInstr, SIEncodingFamily.GFX80> {
2008 SIMCInstr<ps.PseudoInstr, SIEncodingFamily.VI> {
2038 SIMCInstr<ps.PseudoInstr, SIEncodingFamily.GFX80> {
|
| H A D | VOPCInstructions.td | 67 SIMCInstr<opName#"_e32", SIEncodingFamily.NONE> {
710 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.SI>,
714 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>,
948 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.VI>,
952 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.VI>,
|
| H A D | SOPInstructions.td | 25 SIMCInstr<opName, SIEncodingFamily.NONE> {
555 SIMCInstr<opName, SIEncodingFamily.NONE> {
1116 SIMCInstr<opName, SIEncodingFamily.SI> {
1253 SIMCInstr<opName, SIEncodingFamily.VI> {
|
| H A D | MIMGInstructions.td | 266 SIMCInstr<NAME, SIEncodingFamily.SI>,
273 SIMCInstr<NAME, SIEncodingFamily.VI>,
|
| H A D | SIInstrInfo.cpp | 5508 enum SIEncodingFamily { enum
5517 static SIEncodingFamily subtargetEncodingFamily(const GCNSubtarget &ST) { in subtargetEncodingFamily()
5523 return SIEncodingFamily::SI; in subtargetEncodingFamily()
5526 return SIEncodingFamily::VI; in subtargetEncodingFamily()
5532 SIEncodingFamily Gen = subtargetEncodingFamily(ST); in pseudoToMCOpcode()
5536 Gen = SIEncodingFamily::GFX9; in pseudoToMCOpcode()
5539 Gen = ST.getGeneration() == AMDGPUSubtarget::GFX9 ? SIEncodingFamily::SDWA9 in pseudoToMCOpcode()
5540 : SIEncodingFamily::SDWA; in pseudoToMCOpcode()
5545 Gen = SIEncodingFamily::GFX80; in pseudoToMCOpcode()
|
| H A D | FLATInstructions.td | 23 SIMCInstr<opName, SIEncodingFamily.NONE> {
919 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.SI> {
987 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.VI> {
|
| H A D | DSInstructions.td | 12 SIMCInstr <opName, SIEncodingFamily.NONE> {
835 SIMCInstr <ds.Mnemonic, SIEncodingFamily.SI> {
1006 SIMCInstr <ds.Mnemonic, SIEncodingFamily.VI> {
|
| H A D | VOP3PInstructions.td | 308 def _vi : VOP3P_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.VI>,
|