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Searched refs:ResultOps (Results 1 – 3 of 3) sorted by relevance

/freebsd-12.1/contrib/llvm/utils/TableGen/
H A DDAGISelMatcherGen.cpp624 ResultOps.push_back(SlotNo - 1 + i); in EmitResultOfNamedOperand()
638 ResultOps.push_back(NextRecordedOperandNo++); in EmitResultOfNamedOperand()
644 ResultOps.push_back(SlotNo + i); in EmitResultOfNamedOperand()
653 ResultOps.push_back(NextRecordedOperandNo++); in EmitResultLeafAsOperand()
664 ResultOps.push_back(NextRecordedOperandNo++); in EmitResultLeafAsOperand()
670 ResultOps.push_back(NextRecordedOperandNo++); in EmitResultLeafAsOperand()
681 ResultOps.push_back(NextRecordedOperandNo++); in EmitResultLeafAsOperand()
689 ResultOps.push_back(NextRecordedOperandNo++); in EmitResultLeafAsOperand()
942 ResultOps.push_back(NextRecordedOperandNo++); in EmitResultSDNodeXFormAsOperand()
949 return EmitResultOfNamedOperand(N, ResultOps); in EmitResultOperand()
[all …]
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp3627 std::vector<SDValue> ResultOps; in ChooseConstraint() local
3629 ResultOps, *DAG); in ChooseConstraint()
3630 if (!ResultOps.empty()) { in ChooseConstraint()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp17948 SDValue ResultOps[] = { Low32, High32 }; in FP_TO_INTHelper() local
17951 ? DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, ResultOps) in FP_TO_INTHelper()
17952 : DAG.getMergeValues(ResultOps, DL); in FP_TO_INTHelper()