Searched refs:RegsForValue (Results 1 – 3 of 3) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.h | 996 struct RegsForValue { struct
1023 RegsForValue() = default; argument
1024 RegsForValue(const SmallVector<unsigned, 4> ®s, MVT regvt, EVT valuevt,
1026 RegsForValue(LLVMContext &Context, const TargetLowering &TLI,
1035 void append(const RegsForValue &RHS) { in append() argument
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| H A D | SelectionDAGBuilder.cpp | 759 RegsForValue::RegsForValue(const SmallVector<unsigned, 4> ®s, MVT regvt, in RegsForValue() function in RegsForValue
764 RegsForValue::RegsForValue(LLVMContext &Context, const TargetLowering &TLI, in RegsForValue() function in RegsForValue
788 SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG, in getCopyFromRegs()
875 void RegsForValue::getCopyToRegs(SDValue Val, SelectionDAG &DAG, in getCopyToRegs()
985 RegsForValue::getRegsAndSizes() const { in getRegsAndSizes()
1204 RegsForValue RFV(*DAG.getContext(), DAG.getTargetLoweringInfo(), in getCopyFromRegs()
7200 RegsForValue AssignedRegs;
7444 OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT); in GetRegistersForValue()
7660 RegsForValue RetValRegs; in visitInlineAsm()
7663 std::vector<std::pair<RegsForValue, Value *>> IndirectStoresToEmit; in visitInlineAsm()
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| H A D | StatepointLowering.cpp | 872 RegsForValue RFV(*DAG.getContext(), DAG.getTargetLoweringInfo(), in LowerStatepoint()
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