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Searched refs:RegisterFile (Results 1 – 10 of 10) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/MCA/HardwareUnits/
H A DRegisterFile.cpp26 RegisterFile::RegisterFile(const MCSchedModel &SM, const MCRegisterInfo &mri, in RegisterFile() function in llvm::mca::RegisterFile
34 void RegisterFile::initialize(const MCSchedModel &SM, unsigned NumRegs) { in initialize()
62 void RegisterFile::cycleStart() { in cycleStart()
67 void RegisterFile::addRegisterFile(const MCRegisterFileDesc &RF, in addRegisterFile()
133 void RegisterFile::freePhysRegs(const RegisterRenamingInfo &Entry, in freePhysRegs()
148 void RegisterFile::addRegisterWrite(WriteRef Write, in addRegisterWrite()
244 void RegisterFile::removeRegisterWrite( in removeRegisterWrite()
362 void RegisterFile::collectWrites(const ReadState &RS, in collectWrites()
404 void RegisterFile::addRegisterRead(ReadState &RS, in addRegisterRead()
418 unsigned RegisterFile::isAvailable(ArrayRef<unsigned> Regs) const { in isAvailable()
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/freebsd-12.1/contrib/llvm/include/llvm/MCA/Stages/
H A DRetireStage.h30 RegisterFile &PRF;
36 RetireStage(RetireControlUnit &R, RegisterFile &F) in RetireStage()
H A DDispatchStage.h58 RegisterFile &PRF;
74 RegisterFile &F) in DispatchStage()
/freebsd-12.1/contrib/llvm/include/llvm/MCA/HardwareUnits/
H A DRegisterFile.h36 class RegisterFile : public HardwareUnit {
188 RegisterFile(const MCSchedModel &SM, const MCRegisterInfo &mri,
/freebsd-12.1/contrib/llvm/lib/MCA/
H A DContext.cpp37 auto PRF = llvm::make_unique<RegisterFile>(SM, MRI, Opts.RegisterFileSize); in createDefaultPipeline()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86ScheduleBtVer2.td51 def JIntegerPRF : RegisterFile<64, [GR64, CCR], [1, 1], [1, 0],
64 def JFpuPRF: RegisterFile<72, [VR64, VR128, VR256], [1, 1, 2], [1, 1, 0],
H A DX86ScheduleBdVer2.td99 def PdIntegerPRF : RegisterFile<96, [GR64, CCR]>;
116 def PdFpuPRF : RegisterFile<160, [VR64, VR128, VR256], [1, 1, 2]>;
H A DX86ScheduleZnver1.td101 def ZnIntegerPRF : RegisterFile<168, [GR64, CCR]>;
111 def ZnFpuPRF: RegisterFile<160, [VR64, VR128, VR256], [1, 1, 2]>;
/freebsd-12.1/contrib/llvm/include/llvm/Target/
H A DTargetSchedule.td537 class RegisterFile<int numPhysRegs, list<RegisterClass> Classes = [],
/freebsd-12.1/lib/clang/libllvm/
H A DMakefile704 SRCS_EXT+= MCA/HardwareUnits/RegisterFile.cpp