Searched refs:RegHi (Results 1 – 4 of 4) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 1610 unsigned RegHi = RegLo + 1; in LowerReturn() local
1614 Chain = DAG.getCopyToReg(Chain, DL, RegHi, Hi, Glue); in LowerReturn()
1616 RetOps.push_back(DAG.getRegister(RegHi, MVT::i32)); in LowerReturn()
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1710 int64_t RegLo, RegHi; in ParseAMDGPURegister() local
1724 RegHi = RegLo; in ParseAMDGPURegister()
1726 if (getParser().parseAbsoluteExpression(RegHi)) in ParseAMDGPURegister()
1734 RegWidth = (RegHi - RegLo) + 1; in ParseAMDGPURegister()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMExpandPseudoInsts.cpp | 1032 unsigned RegHi = TRI->getSubReg(Reg.getReg(), ARM::gsub_1); in addExclusiveRegPair() local
1034 MIB.addReg(RegHi, Flags); in addExclusiveRegPair()
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 1270 unsigned RegHi = RI.getSubReg(Reg, AMDGPU::sub1); in expandPostRAPseudo() local
1283 MachineInstrBuilder MIB = BuildMI(MF, DL, get(AMDGPU::S_ADDC_U32), RegHi) in expandPostRAPseudo()
1284 .addReg(RegHi); in expandPostRAPseudo()
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