Searched refs:RISCVAsmBackend (Results 1 – 4 of 4) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVAsmBackend.cpp | 28 bool RISCVAsmBackend::shouldForceRelocation(const MCAssembler &Asm, in shouldForceRelocation()
63 bool RISCVAsmBackend::fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, in fixupNeedsRelaxationAdvanced()
91 void RISCVAsmBackend::relaxInstruction(const MCInst &Inst, in relaxInstruction()
129 unsigned RISCVAsmBackend::getRelaxedOpcode(unsigned Op) const { in getRelaxedOpcode()
143 bool RISCVAsmBackend::mayNeedRelaxation(const MCInst &Inst, in mayNeedRelaxation()
148 bool RISCVAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count) const { in writeNopData()
263 void RISCVAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, in applyFixup()
291 RISCVAsmBackend::createObjectTargetWriter() const { in createObjectTargetWriter()
301 return new RISCVAsmBackend(STI, OSABI, TT.isArch64Bit()); in createRISCVAsmBackend()
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| H A D | RISCVAsmBackend.h | 24 class RISCVAsmBackend : public MCAsmBackend {
31 RISCVAsmBackend(const MCSubtargetInfo &STI, uint8_t OSABI, bool Is64Bit) in RISCVAsmBackend() function
34 ~RISCVAsmBackend() override {} in ~RISCVAsmBackend()
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| /freebsd-12.1/contrib/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 1191 RISCVAsmBackend &MAB = in ParseInstruction()
1192 static_cast<RISCVAsmBackend &>(Assembler->getBackend()); in ParseInstruction()
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| /freebsd-12.1/lib/clang/libllvm/ |
| H A D | Makefile | 1136 SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
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