| /freebsd-12.1/contrib/llvm/include/llvm/ADT/ |
| H A D | SparseBitVector.h | 241 const SparseBitVectorElement &RHS2, in intersectWithComplement()
247 Bits[i] = RHS1.Bits[i] & ~RHS2.Bits[i]; in intersectWithComplement()
689 const SparseBitVector<ElementSize> &RHS2) in intersectWithComplement() argument
692 intersectWithComplement(RHS2); in intersectWithComplement()
694 } else if (this == &RHS2) { in intersectWithComplement()
695 SparseBitVector RHS2Copy(RHS2); in intersectWithComplement()
703 ElementListConstIter Iter2 = RHS2.Elements.begin(); in intersectWithComplement()
711 while (Iter2 != RHS2.Elements.end()) { in intersectWithComplement()
735 const SparseBitVector<ElementSize> *RHS2) { in intersectWithComplement() argument
736 intersectWithComplement(*RHS1, *RHS2); in intersectWithComplement()
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| /freebsd-12.1/contrib/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSelect.cpp | 1821 Value *LHS2, *RHS2; in visitSelectInst() local
1822 if (SelectPatternFlavor SPF2 = matchSelectPattern(LHS, LHS2, RHS2).Flavor) in visitSelectInst()
1824 RHS2, SI, SPF, RHS)) in visitSelectInst()
1826 if (SelectPatternFlavor SPF2 = matchSelectPattern(RHS, LHS2, RHS2).Flavor) in visitSelectInst()
1828 RHS2, SI, SPF, LHS)) in visitSelectInst()
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| /freebsd-12.1/contrib/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 581 SDValue RHS2 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, RHS_1, in getAVRCmp() local
594 Cmp = DAG.getNode(AVRISD::CMPC, DL, MVT::Glue, LHS2, RHS2, Cmp); in getAVRCmp()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 4289 SDValue RHS2 = Op2.getOperand(1); in isSaturatingConditional() local
4300 ? &RHS2 in isSaturatingConditional()
4304 SDValue V2Tmp = (K2 && *K2 == LHS2) ? RHS2 : LHS2; in isSaturatingConditional()
4325 : isLowerSaturate(LHS2, RHS2, TrueVal2, FalseVal2, CC2, *K2) in isSaturatingConditional()
4331 : isUpperSaturate(LHS2, RHS2, TrueVal2, FalseVal2, CC2, *K2) in isSaturatingConditional()
4629 SDValue RHS1, RHS2; in OptimizeVFPBrcond() local
4631 expandf64Toi32(RHS, DAG, RHS1, RHS2); in OptimizeVFPBrcond()
4633 RHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, RHS2, Mask); in OptimizeVFPBrcond()
4637 SDValue Ops[] = { Chain, ARMcc, LHS1, LHS2, RHS1, RHS2, Dest }; in OptimizeVFPBrcond()
9386 unsigned RHS2 = MI.getOperand(4).getReg(); in EmitInstrWithCustomInserter() local
[all …]
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| /freebsd-12.1/contrib/llvm/lib/Analysis/ |
| H A D | ValueTracking.cpp | 2241 const Value *LHS, *RHS, *LHS2, *RHS2; in isSignedMinMaxClamp() local
2249 SelectPatternFlavor SPF2 = matchSelectPattern(LHS, LHS2, RHS2).Flavor; in isSignedMinMaxClamp()
2253 if (!match(RHS2, m_APInt(CHigh))) in isSignedMinMaxClamp()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 19263 SDValue RHS2 = extract128BitVector(RHS, NumElems / 2, DAG, dl); in Lower256IntVSETCC() local
19270 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, RHS2, CC)); in Lower256IntVSETCC()
23496 SDValue RHS2 = extract128BitVector(RHS, NumElems / 2, DAG, dl); in split256IntArith() local
23503 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, RHS2)); in split256IntArith()
23525 SDValue RHS2 = extract256BitVector(RHS, NumElems / 2, DAG, dl); in split512IntArith() local
23532 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, RHS2)); in split512IntArith()
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