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Searched refs:RADEON_CP_RB_CNTL (Results 1 – 5 of 5) sorted by relevance

/freebsd-12.1/sys/dev/drm2/radeon/
H A Drs600.c410 tmp = RREG32(RADEON_CP_RB_CNTL); in rs600_asic_reset()
411 WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA); in rs600_asic_reset()
414 WREG32(RADEON_CP_RB_CNTL, tmp); in rs600_asic_reset()
H A Dr300.c398 tmp = RREG32(RADEON_CP_RB_CNTL); in r300_asic_reset()
399 WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA); in r300_asic_reset()
402 WREG32(RADEON_CP_RB_CNTL, tmp); in r300_asic_reset()
H A Dr100.c1161 WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_NO_UPDATE); in r100_cp_init()
1167 WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA | RADEON_RB_NO_UPDATE); in r100_cp_init()
1184 WREG32(RADEON_CP_RB_CNTL, tmp); in r100_cp_init()
2683 tmp = RREG32(RADEON_CP_RB_CNTL); in r100_asic_reset()
2684 WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA); in r100_asic_reset()
2687 WREG32(RADEON_CP_RB_CNTL, tmp); in r100_asic_reset()
4092 tmp = RREG32(RADEON_CP_RB_CNTL); in r100_restore_sanity()
4094 WREG32(RADEON_CP_RB_CNTL, 0); in r100_restore_sanity()
H A Dradeon_drv.h1035 #define RADEON_CP_RB_CNTL 0x0704 macro
H A Dradeon_reg.h3300 #define RADEON_CP_RB_CNTL 0x0704 macro