Home
last modified time | relevance | path

Searched refs:Promote (Results 1 – 25 of 53) sorted by relevance

123

/freebsd-12.1/contrib/llvm/lib/Target/Lanai/
H A DLanaiCallingConv.td20 // Promote i8/i16 args to i32
33 // Promote i8/i16 args to i32
H A DLanaiISelLowering.cpp137 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in LanaiTargetLowering()
138 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); in LanaiTargetLowering()
139 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in LanaiTargetLowering()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86CallingConv.td158 // Promote v16i1 arguments to i16.
161 // Promote v32i1 arguments to i32.
312 // Promote all types to i32
365 // Promote all types to i64
374 // Promote all types to i64
416 // Promote all types to i64
598 // Promote i1/v1i1 arguments to i8.
693 // Promote i8/i16 arguments to i32.
856 // Promote i1 to i8.
938 // Promote i8/i16 arguments to i32.
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/BPF/
H A DBPFCallingConv.td19 // Promote i8/i16/i32 args to i64
37 // Promote i8/i16/i32 args to i64
H A DBPFISelLowering.cpp108 setOperationAction(ISD::BSWAP, MVT::i32, Promote); in BPFTargetLowering()
109 setOperationAction(ISD::BR_CC, MVT::i32, Promote); in BPFTargetLowering()
124 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in BPFTargetLowering()
125 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); in BPFTargetLowering()
126 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in BPFTargetLowering()
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp132 setOperationAction(ISD::FADD, MVT::f16, Promote); in MipsSETargetLowering()
133 setOperationAction(ISD::FSUB, MVT::f16, Promote); in MipsSETargetLowering()
134 setOperationAction(ISD::FMUL, MVT::f16, Promote); in MipsSETargetLowering()
135 setOperationAction(ISD::FDIV, MVT::f16, Promote); in MipsSETargetLowering()
136 setOperationAction(ISD::FREM, MVT::f16, Promote); in MipsSETargetLowering()
137 setOperationAction(ISD::FMA, MVT::f16, Promote); in MipsSETargetLowering()
138 setOperationAction(ISD::FNEG, MVT::f16, Promote); in MipsSETargetLowering()
139 setOperationAction(ISD::FABS, MVT::f16, Promote); in MipsSETargetLowering()
142 setOperationAction(ISD::FCOS, MVT::f16, Promote); in MipsSETargetLowering()
146 setOperationAction(ISD::FPOW, MVT::f16, Promote); in MipsSETargetLowering()
[all …]
H A DMipsCallingConv.td82 // Promote i8/i16 arguments to i32.
97 // Promote i1/i8/i16 return values to i32.
265 // Promote i8/i16 arguments to i32.
/freebsd-12.1/contrib/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp62 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering()
63 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering()
64 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering()
118 setOperationAction(ISD::MUL, MVT::i8, Promote); in MSP430TargetLowering()
119 setOperationAction(ISD::MULHS, MVT::i8, Promote); in MSP430TargetLowering()
120 setOperationAction(ISD::MULHU, MVT::i8, Promote); in MSP430TargetLowering()
121 setOperationAction(ISD::SMUL_LOHI, MVT::i8, Promote); in MSP430TargetLowering()
122 setOperationAction(ISD::UMUL_LOHI, MVT::i8, Promote); in MSP430TargetLowering()
129 setOperationAction(ISD::UDIV, MVT::i8, Promote); in MSP430TargetLowering()
130 setOperationAction(ISD::UDIVREM, MVT::i8, Promote); in MSP430TargetLowering()
[all …]
H A DMSP430CallingConv.td30 // Promote i8 arguments to i16.
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1346 setOperationAction(ISD::CTLZ, MVT::i8, Promote); in HexagonTargetLowering()
1347 setOperationAction(ISD::CTLZ, MVT::i16, Promote); in HexagonTargetLowering()
1348 setOperationAction(ISD::CTTZ, MVT::i8, Promote); in HexagonTargetLowering()
1349 setOperationAction(ISD::CTTZ, MVT::i16, Promote); in HexagonTargetLowering()
1352 setOperationAction(ISD::CTPOP, MVT::i8, Promote); in HexagonTargetLowering()
1353 setOperationAction(ISD::CTPOP, MVT::i16, Promote); in HexagonTargetLowering()
1354 setOperationAction(ISD::CTPOP, MVT::i32, Promote); in HexagonTargetLowering()
1453 setOperationAction(ISD::SELECT, VT, Promote); in HexagonTargetLowering()
1522 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Promote); in HexagonTargetLowering()
1523 setOperationAction(ISD::FP_TO_UINT, MVT::i8, Promote); in HexagonTargetLowering()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/XCore/
H A DXCoreCallingConv.td28 // Promote i8/i16 arguments to i32.
H A DXCoreISelLowering.cpp124 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in XCoreTargetLowering()
125 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); in XCoreTargetLowering()
126 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in XCoreTargetLowering()
/freebsd-12.1/contrib/llvm/lib/Target/ARC/
H A DARCCallingConv.td29 // Promote i8/i16 arguments to i32.
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.td33 // Promote i32 to i64 if it has an explicit extension type.
65 // Promote i32 to i64 if it has an explicit extension type.
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp182 setOperationAction(ISD::SELECT, MVT::i1, Promote); in SITargetLowering()
184 setOperationAction(ISD::SELECT, MVT::f64, Promote); in SITargetLowering()
193 setOperationAction(ISD::SETCC, MVT::i1, Promote); in SITargetLowering()
433 setOperationAction(ISD::ROTR, MVT::i16, Promote); in SITargetLowering()
434 setOperationAction(ISD::ROTL, MVT::i16, Promote); in SITargetLowering()
436 setOperationAction(ISD::SDIV, MVT::i16, Promote); in SITargetLowering()
437 setOperationAction(ISD::UDIV, MVT::i16, Promote); in SITargetLowering()
438 setOperationAction(ISD::SREM, MVT::i16, Promote); in SITargetLowering()
439 setOperationAction(ISD::UREM, MVT::i16, Promote); in SITargetLowering()
444 setOperationAction(ISD::CTTZ, MVT::i16, Promote); in SITargetLowering()
[all …]
H A DAMDGPUISelLowering.cpp149 setOperationAction(ISD::LOAD, MVT::f32, Promote); in AMDGPUTargetLowering()
152 setOperationAction(ISD::LOAD, MVT::v2f32, Promote); in AMDGPUTargetLowering()
155 setOperationAction(ISD::LOAD, MVT::v4f32, Promote); in AMDGPUTargetLowering()
158 setOperationAction(ISD::LOAD, MVT::v8f32, Promote); in AMDGPUTargetLowering()
164 setOperationAction(ISD::LOAD, MVT::i64, Promote); in AMDGPUTargetLowering()
167 setOperationAction(ISD::LOAD, MVT::v2i64, Promote); in AMDGPUTargetLowering()
170 setOperationAction(ISD::LOAD, MVT::f64, Promote); in AMDGPUTargetLowering()
173 setOperationAction(ISD::LOAD, MVT::v2f64, Promote); in AMDGPUTargetLowering()
234 setOperationAction(ISD::STORE, MVT::f32, Promote); in AMDGPUTargetLowering()
249 setOperationAction(ISD::STORE, MVT::i64, Promote); in AMDGPUTargetLowering()
[all …]
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DTargetLowering.h114 Promote, // This operation should be executed in a larger type. enumerator
401 if (getOperationAction(ISD::LOAD, LoadMVT) == Promote && in isLoadBitCastBeneficial()
895 getOperationAction(Op, VT) == Promote); in isOperationLegalOrPromote()
905 getOperationAction(Op, VT) == Promote); in isOperationLegalOrCustomOrPromote()
1095 assert(Action != Promote && "Can't promote condition code!"); in getCondCodeAction()
1114 assert(getOperationAction(Op, VT) == Promote && in getTypeToPromoteTo()
1132 getOperationAction(Op, NVT) == Promote); in getTypeToPromoteTo()
1979 setOperationAction(Opc, OrigVT, Promote); in setOperationPromotedToType()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp335 setOperationAction(ISD::FREM, MVT::f16, Promote); in AArch64TargetLowering()
338 setOperationAction(ISD::FPOW, MVT::f16, Promote); in AArch64TargetLowering()
341 setOperationAction(ISD::FPOWI, MVT::f16, Promote); in AArch64TargetLowering()
344 setOperationAction(ISD::FCOS, MVT::f16, Promote); in AArch64TargetLowering()
347 setOperationAction(ISD::FSIN, MVT::f16, Promote); in AArch64TargetLowering()
350 setOperationAction(ISD::FSINCOS, MVT::f16, Promote); in AArch64TargetLowering()
353 setOperationAction(ISD::FEXP, MVT::f16, Promote); in AArch64TargetLowering()
356 setOperationAction(ISD::FEXP2, MVT::f16, Promote); in AArch64TargetLowering()
359 setOperationAction(ISD::FLOG, MVT::f16, Promote); in AArch64TargetLowering()
362 setOperationAction(ISD::FLOG2, MVT::f16, Promote); in AArch64TargetLowering()
[all …]
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp151 SDValue Promote(SDValue Op);
449 case TargetLowering::Promote: in LegalizeOp()
450 Result = Promote(Op); in LegalizeOp()
482 SDValue VectorLegalizer::Promote(SDValue Op) { in Promote() function in VectorLegalizer
/freebsd-12.1/contrib/llvm/tools/lldb/include/lldb/Utility/
H A DScalar.h162 bool Promote(Scalar::Type type);
/freebsd-12.1/contrib/llvm/lib/Target/Sparc/
H A DSparcCallingConv.td106 // - Promote to integer or floating point registers depending on type.
/freebsd-12.1/contrib/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp393 setFP16OperationAction(ISD::SETCC, MVT::f16, Legal, Promote); in NVPTXTargetLowering()
470 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in NVPTXTargetLowering()
471 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); in NVPTXTargetLowering()
538 setFP16OperationAction(Op, MVT::f16, Legal, Promote); in NVPTXTargetLowering()
568 setOperationAction(Op, MVT::f16, Promote); in NVPTXTargetLowering()
573 setOperationAction(ISD::FMINNUM, MVT::f16, Promote); in NVPTXTargetLowering()
574 setOperationAction(ISD::FMAXNUM, MVT::f16, Promote); in NVPTXTargetLowering()
575 setOperationAction(ISD::FMINIMUM, MVT::f16, Promote); in NVPTXTargetLowering()
576 setOperationAction(ISD::FMAXIMUM, MVT::f16, Promote); in NVPTXTargetLowering()
/freebsd-12.1/contrib/llvm/tools/lldb/source/Utility/
H A DScalar.cpp55 if (temp_value.Promote(lhs_type)) // Promote it in PromoteToMaxType()
61 if (temp_value.Promote(rhs_type)) // Promote it in PromoteToMaxType()
396 bool Scalar::Promote(Scalar::Type type) { in Promote() function in Scalar
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMCallingConv.td114 // Promote i8/i16 arguments to i32.
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp158 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in PPCTargetLowering()
430 setOperationAction(ISD::VAARG, MVT::i1, Promote); in PPCTargetLowering()
432 setOperationAction(ISD::VAARG, MVT::i8, Promote); in PPCTargetLowering()
434 setOperationAction(ISD::VAARG, MVT::i16, Promote); in PPCTargetLowering()
576 setOperationAction(ISD::AND , VT, Promote); in PPCTargetLowering()
578 setOperationAction(ISD::OR , VT, Promote); in PPCTargetLowering()
580 setOperationAction(ISD::XOR , VT, Promote); in PPCTargetLowering()
582 setOperationAction(ISD::LOAD , VT, Promote); in PPCTargetLowering()
584 setOperationAction(ISD::SELECT, VT, Promote); in PPCTargetLowering()
587 setOperationAction(ISD::SELECT_CC, VT, Promote); in PPCTargetLowering()
[all …]

123