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Searched refs:PIPECONF_ENABLE (Results 1 – 6 of 6) sorted by relevance

/freebsd-12.1/sys/dev/drm2/i915/
H A Dintel_overlay.c839 … (I915_READ(PIPECONF(crtc->pipe)) & (PIPECONF_DOUBLE_WIDE | PIPECONF_ENABLE)) != PIPECONF_ENABLE) in check_overlay_possible_on_crtc()
H A Dintel_sprite.c444 if (!(I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_ENABLE)) in intel_update_plane()
H A Dintel_display.c1228 cur_state = !!(val & PIPECONF_ENABLE); in assert_pipe()
1836 if (val & PIPECONF_ENABLE) in intel_enable_pipe()
1839 I915_WRITE(reg, val | PIPECONF_ENABLE); in intel_enable_pipe()
1875 if ((val & PIPECONF_ENABLE) == 0) in intel_disable_pipe()
1878 I915_WRITE(reg, val & ~PIPECONF_ENABLE); in intel_disable_pipe()
4817 PIPECONF_ENABLE | in i9xx_crtc_mode_set()
5821 (PIPECONF_ENABLE | I965_PIPECONF_ACTIVE)); in haswell_crtc_mode_set()
9286 if (tmp & PIPECONF_ENABLE) in intel_modeset_setup_hw_state()
H A Dintel_tv.c1104 I915_WRITE(pipeconf_reg, pipeconf & ~PIPECONF_ENABLE); in intel_tv_mode_set()
H A Di915_irq.c131 return I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_ENABLE; in i915_pipe_enabled()
H A Di915_reg.h2649 #define PIPECONF_ENABLE (1<<31) macro