Home
last modified time | relevance | path

Searched refs:OutR (Results 1 – 2 of 2) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonGenPredicate.cpp414 Register OutR(Op0); in convertToPredForm() local
433 const TargetRegisterClass *RC = MRI->getRegClass(OutR.R); in convertToPredForm()
437 MRI->replaceRegWith(OutR.R, NewOutR); in convertToPredForm()
H A DHexagonBitSimplify.cpp2931 bool isShuffleOf(unsigned OutR, unsigned InpR) const;
3024 bool HexagonLoopRescheduling::isShuffleOf(unsigned OutR, unsigned InpR) const { in isShuffleOf() argument
3025 if (!BTP->has(OutR) || !BTP->has(InpR)) in isShuffleOf()
3027 const BitTracker::RegisterCell &OutC = BTP->lookup(OutR); in isShuffleOf()