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Searched refs:OutMI (Results 1 – 25 of 32) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsMCInstLower.cpp219 OutMI.setOpcode(Mips::LUi); in lowerLongBranchLUi()
222 OutMI.addOperand(LowerOperand(MI->getOperand(0))); in lowerLongBranchLUi()
247 OutMI.addOperand(MCOperand::createExpr(MipsExpr)); in lowerLongBranchLUi()
257 OutMI.setOpcode(Opcode); in lowerLongBranchADDiu()
281 OutMI.addOperand(LowerOperand(MO)); in lowerLongBranchADDiu()
305 lowerLongBranchLUi(MI, OutMI); in lowerLongBranch()
309 lowerLongBranchADDiu(MI, OutMI, Mips::ADDiu); in lowerLongBranch()
313 lowerLongBranchADDiu(MI, OutMI, Mips::DADDiu); in lowerLongBranch()
319 if (lowerLongBranch(MI, OutMI)) in Lower()
322 OutMI.setOpcode(MI->getOpcode()); in Lower()
[all …]
H A DMipsMCInstLower.h38 void Lower(const MachineInstr *MI, MCInst &OutMI) const;
46 void lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI) const;
47 void lowerLongBranchADDiu(const MachineInstr *MI, MCInst &OutMI,
49 bool lowerLongBranch(const MachineInstr *MI, MCInst &OutMI) const;
/freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/
H A DWebAssemblyMCInstLower.cpp46 static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI);
165 MCInst &OutMI) const { in Lower()
166 OutMI.setOpcode(MI->getOpcode()); in Lower()
267 OutMI.addOperand(MCOp); in Lower()
271 removeRegisterOperands(MI, OutMI); in Lower()
274 static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI) { in removeRegisterOperands() argument
292 auto RegOpcode = OutMI.getOpcode(); in removeRegisterOperands()
295 OutMI.setOpcode(StackOpcode); in removeRegisterOperands()
298 for (auto I = OutMI.getNumOperands(); I; --I) { in removeRegisterOperands()
299 auto &MO = OutMI.getOperand(I - 1); in removeRegisterOperands()
[all …]
H A DWebAssemblyMCInstLower.h42 void Lower(const MachineInstr *MI, MCInst &OutMI) const;
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DAMDGPUMCInstLower.cpp57 void lower(const MachineInstr *MI, MCInst &OutMI) const;
67 void lower(const MachineInstr *MI, MCInst &OutMI) const;
165 void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const { in lower()
177 OutMI.setOpcode(TII->pseudoToMCOpcode(AMDGPU::S_SWAPPC_B64)); in lower()
181 OutMI.addOperand(Dest); in lower()
182 OutMI.addOperand(Src); in lower()
196 OutMI.setOpcode(MCOpcode); in lower()
201 OutMI.addOperand(MCOp); in lower()
363 void R600MCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const { in lower()
364 OutMI.setOpcode(MI->getOpcode()); in lower()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86MCInstLower.cpp442 switch (OutMI.getOpcode()) { in Lower()
488 OutMI.setOpcode(NewOpc); in Lower()
502 OutMI.setOpcode(NewOpc); in Lower()
516 OutMI = MCInst(); in Lower()
517 OutMI.setOpcode(Opcode); in Lower()
518 OutMI.addOperand(Saved); in Lower()
524 OutMI = MCInst(); in Lower()
531 OutMI = MCInst(); in Lower()
540 OutMI = MCInst(); in Lower()
565 OutMI = MCInst(); in Lower()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64MCInstLower.cpp295 void AArch64MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
296 OutMI.setOpcode(MI->getOpcode()); in Lower()
301 OutMI.addOperand(MCOp); in Lower()
304 switch (OutMI.getOpcode()) { in Lower()
306 OutMI = MCInst(); in Lower()
307 OutMI.setOpcode(AArch64::RET); in Lower()
308 OutMI.addOperand(MCOperand::createReg(AArch64::LR)); in Lower()
311 OutMI = MCInst(); in Lower()
312 OutMI.setOpcode(AArch64::RET); in Lower()
313 OutMI.addOperand(MCOperand::createReg(AArch64::LR)); in Lower()
/freebsd-12.1/contrib/llvm/lib/Target/BPF/
H A DBPFMCInstLower.cpp48 void BPFMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
49 OutMI.setOpcode(MI->getOpcode()); in Lower()
82 OutMI.addOperand(MCOp); in Lower()
H A DBPFMCInstLower.h35 void Lower(const MachineInstr *MI, MCInst &OutMI) const;
/freebsd-12.1/contrib/llvm/lib/Target/Sparc/
H A DSparcMCInstLower.cpp95 MCInst &OutMI, in LowerSparcMachineInstrToMCInst() argument
99 OutMI.setOpcode(MI->getOpcode()); in LowerSparcMachineInstrToMCInst()
106 OutMI.addOperand(MCOp); in LowerSparcMachineInstrToMCInst()
/freebsd-12.1/contrib/llvm/lib/Target/RISCV/
H A DRISCVMCInstLower.cpp99 void llvm::LowerRISCVMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, in LowerRISCVMachineInstrToMCInst() argument
101 OutMI.setOpcode(MI->getOpcode()); in LowerRISCVMachineInstrToMCInst()
106 OutMI.addOperand(MCOp); in LowerRISCVMachineInstrToMCInst()
H A DRISCV.h31 void LowerRISCVMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZMCInstLower.cpp95 void SystemZMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const { in lower()
96 OutMI.setOpcode(MI->getOpcode()); in lower()
101 OutMI.addOperand(lowerOperand(MO)); in lower()
H A DSystemZMCInstLower.h33 void lower(const MachineInstr *MI, MCInst &OutMI) const;
/freebsd-12.1/contrib/llvm/lib/Target/AVR/
H A DAVRMCInstLower.cpp63 void AVRMCInstLower::lowerInstruction(const MachineInstr &MI, MCInst &OutMI) const { in lowerInstruction()
64 OutMI.setOpcode(MI.getOpcode()); in lowerInstruction()
107 OutMI.addOperand(MCOp); in lowerInstruction()
H A DAVRMCInstLower.h32 void lowerInstruction(const MachineInstr &MI, MCInst &OutMI) const;
/freebsd-12.1/contrib/llvm/lib/Target/ARC/
H A DARCMCInstLower.cpp105 void ARCMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
106 OutMI.setOpcode(MI->getOpcode()); in Lower()
113 OutMI.addOperand(MCOp); in Lower()
H A DARCMCInstLower.h34 void Lower(const MachineInstr *MI, MCInst &OutMI) const;
/freebsd-12.1/contrib/llvm/lib/Target/XCore/
H A DXCoreMCInstLower.cpp104 void XCoreMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
105 OutMI.setOpcode(MI->getOpcode()); in Lower()
112 OutMI.addOperand(MCOp); in Lower()
H A DXCoreMCInstLower.h32 void Lower(const MachineInstr *MI, MCInst &OutMI) const;
/freebsd-12.1/contrib/llvm/lib/Target/MSP430/
H A DMSP430MCInstLower.cpp116 void MSP430MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
117 OutMI.setOpcode(MI->getOpcode()); in Lower()
158 OutMI.addOperand(MCOp); in Lower()
H A DMSP430MCInstLower.h34 void Lower(const MachineInstr *MI, MCInst &OutMI) const;
/freebsd-12.1/contrib/llvm/lib/Target/Lanai/
H A DLanaiMCInstLower.cpp94 void LanaiMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
95 OutMI.setOpcode(MI->getOpcode()); in Lower()
137 OutMI.addOperand(MCOp); in Lower()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMMCInstLower.cpp124 void llvm::LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, in LowerARMMachineInstrToMCInst() argument
126 OutMI.setOpcode(MI->getOpcode()); in LowerARMMachineInstrToMCInst()
164 OutMI.addOperand(MCOp); in LowerARMMachineInstrToMCInst()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCMCInstLower.cpp151 void llvm::LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, in LowerPPCMachineInstrToMCInst() argument
153 OutMI.setOpcode(MI->getOpcode()); in LowerPPCMachineInstrToMCInst()
159 OutMI.addOperand(MCOp); in LowerPPCMachineInstrToMCInst()

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