Searched refs:OrigReg (Results 1 – 8 of 8) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64A57FPLoadBalancing.cpp | 556 unsigned OrigReg = U.getReg(); in colorChain() local 557 U.setReg(Substs[OrigReg]); in colorChain() 561 ToErase.push_back(OrigReg); in colorChain()
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | TailDuplicator.h | 93 void addSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | TailDuplicator.cpp | 323 void TailDuplicator::addSSAUpdateEntry(unsigned OrigReg, unsigned NewReg, in addSSAUpdateEntry() argument 326 SSAUpdateVals.find(OrigReg); in addSSAUpdateEntry() 332 SSAUpdateVals.insert(std::make_pair(OrigReg, Vals)); in addSSAUpdateEntry() 333 SSAUpdateVRs.push_back(OrigReg); in addSSAUpdateEntry()
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| H A D | InlineSpiller.cpp | 1142 unsigned OrigReg = OrigLI.reg; in isSpillCandBB() local 1148 SmallSetVector<unsigned, 16> &Siblings = Virt2SiblingsMap[OrigReg]; in isSpillCandBB()
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| H A D | SplitKit.cpp | 342 unsigned OrigReg = VRM.getOriginal(CurLI->reg); in isOriginalEndpoint() local 343 const LiveInterval &Orig = LIS.getInterval(OrigReg); in isOriginalEndpoint()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/GlobalISel/ |
| H A D | RegisterBankInfo.cpp | 433 unsigned OrigReg = MO.getReg(); in applyDefaultMapping() local 435 LLVM_DEBUG(dbgs() << " changed, replace " << printReg(OrigReg, nullptr)); in applyDefaultMapping() 441 LLT OrigTy = MRI.getType(OrigReg); in applyDefaultMapping()
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| /freebsd-12.1/contrib/llvm/lib/Transforms/Scalar/ |
| H A D | LoopStrengthReduce.cpp | 3994 const SCEV *OrigReg; member 3997 : LUIdx(LI), Imm(I), OrigReg(R) {} in WorkItem() 4007 OS << "in formulae referencing " << *OrigReg << " in use " << LUIdx in print() 4056 const SCEV *OrigReg = J->second; in GenerateCrossUseConstantOffsets() local 4061 if (!isa<SCEVConstant>(OrigReg) && in GenerateCrossUseConstantOffsets() 4084 WorkItems.push_back(WorkItem(LUIdx, Imm, OrigReg)); in GenerateCrossUseConstantOffsets() 4099 const SCEV *OrigReg = WI.OrigReg; in GenerateCrossUseConstantOffsets() local 4101 Type *IntTy = SE.getEffectiveSCEVType(OrigReg->getType()); in GenerateCrossUseConstantOffsets() 4114 if (F.ScaledReg == OrigReg) { in GenerateCrossUseConstantOffsets() 4143 if (BaseReg != OrigReg) in GenerateCrossUseConstantOffsets() [all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 1284 unsigned OrigReg = OrigOp.Mem.BaseReg; in VerifyAndAdjustOperands() local 1290 !X86MCRegisterClasses[RegClassID].contains(OrigReg)) { in VerifyAndAdjustOperands() 1295 if (X86MCRegisterClasses[X86::GR64RegClassID].contains(OrigReg)) in VerifyAndAdjustOperands() 1297 else if (X86MCRegisterClasses[X86::GR32RegClassID].contains(OrigReg)) in VerifyAndAdjustOperands() 1299 else if (X86MCRegisterClasses[X86::GR16RegClassID].contains(OrigReg)) in VerifyAndAdjustOperands() 1309 if (FinalReg != OrigReg) { in VerifyAndAdjustOperands()
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