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Searched refs:NumIntermediates (Results 1 – 7 of 7) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp868 unsigned &NumIntermediates, in getVectorTypeBreakdownMVT() argument
891 NumIntermediates = NumVectorRegs; in getVectorTypeBreakdownMVT()
1222 unsigned NumIntermediates; in computeRegisterProperties() local
1224 NumIntermediates, RegisterVT, this); in computeRegisterProperties()
1284 unsigned &NumIntermediates, in getVectorTypeBreakdown() argument
1299 NumIntermediates = 1; in getVectorTypeBreakdown()
1324 NumIntermediates = NumVectorRegs; in getVectorTypeBreakdown()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DTargetLowering.h729 unsigned &NumIntermediates,
737 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
738 return getVectorTypeBreakdown(Context, VT, IntermediateVT, NumIntermediates, in getVectorTypeBreakdownForCallingConv()
1188 unsigned NumIntermediates; in getRegisterType() local
1190 NumIntermediates, RegisterVT); in getRegisterType()
1216 unsigned NumIntermediates; in getNumRegisters() local
1217 return getVectorTypeBreakdown(Context, VT, VT1, NumIntermediates, VT2); in getNumRegisters()
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp362 unsigned NumIntermediates; in getCopyFromPartsVector() local
368 NumIntermediates, RegisterVT); in getCopyFromPartsVector()
383 SmallVector<SDValue, 8> Ops(NumIntermediates); in getCopyFromPartsVector()
384 if (NumIntermediates == NumParts) { in getCopyFromPartsVector()
393 assert(NumParts % NumIntermediates == 0 && in getCopyFromPartsVector()
695 unsigned NumIntermediates; in getCopyToPartsVector() local
700 NumIntermediates, RegisterVT); in getCopyToPartsVector()
728 SmallVector<SDValue, 8> Ops(NumIntermediates); in getCopyToPartsVector()
741 if (NumParts == NumIntermediates) { in getCopyToPartsVector()
750 assert(NumParts % NumIntermediates == 0 && in getCopyToPartsVector()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.h38 unsigned &NumIntermediates, MVT &RegisterVT) const override;
H A DSIISelLowering.cpp783 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
791 NumIntermediates = NumElts; in getVectorTypeBreakdownForCallingConv()
792 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
798 NumIntermediates = 2 * NumElts; in getVectorTypeBreakdownForCallingConv()
799 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
808 NumIntermediates = (NumElts + 1) / 2; in getVectorTypeBreakdownForCallingConv()
809 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
814 Context, CC, VT, IntermediateVT, NumIntermediates, RegisterVT); in getVectorTypeBreakdownForCallingConv()
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsISelLowering.h303 unsigned &NumIntermediates, MVT &RegisterVT) const override;
H A DMipsISelLowering.cpp140 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
144 NumIntermediates = VT.getSizeInBits() < RegisterVT.getSizeInBits() in getVectorTypeBreakdownForCallingConv()
148 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()