| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | MachineSSAUpdater.cpp | 122 unsigned NewVR = MRI->createVirtualRegister(RC); in InsertNewDef() local
123 return BuildMI(*BB, I, DebugLoc(), TII->get(Opcode), NewVR); in InsertNewDef()
226 unsigned NewVR = 0; in RewriteUse() local
229 NewVR = GetValueAtEndOfBlockInternal(SourceBB); in RewriteUse()
231 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); in RewriteUse()
234 U.setReg(NewVR); in RewriteUse()
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| H A D | PeepholeOptimizer.cpp | 585 unsigned NewVR = MRI->createVirtualRegister(RC); in INITIALIZE_PASS_DEPENDENCY() local
587 TII->get(TargetOpcode::COPY), NewVR) in INITIALIZE_PASS_DEPENDENCY()
594 UseMO->setReg(NewVR); in INITIALIZE_PASS_DEPENDENCY()
765 unsigned NewVR = MRI.createVirtualRegister(NewRC); in insertPHI() local
768 TII.get(TargetOpcode::PHI), NewVR); in insertPHI()
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| H A D | TargetInstrInfo.cpp | 820 unsigned NewVR = MRI.createVirtualRegister(RC); in reassociateOps() local
821 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in reassociateOps()
830 BuildMI(*MF, Prev.getDebugLoc(), TII->get(Opcode), NewVR) in reassociateOps()
836 .addReg(NewVR, getKillRegState(true)); in reassociateOps()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 4173 unsigned NewVR = MRI.createVirtualRegister(OrrRC); in genAlternativeCodeSequence() local
4188 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in genAlternativeCodeSequence()
4215 unsigned NewVR = MRI.createVirtualRegister(SubRC); in genAlternativeCodeSequence() local
4222 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in genAlternativeCodeSequence()
4265 unsigned NewVR = MRI.createVirtualRegister(OrrRC); in genAlternativeCodeSequence() local
4533 unsigned NewVR = MRI.createVirtualRegister(RC); in genAlternativeCodeSequence() local
4538 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in genAlternativeCodeSequence()
4553 unsigned NewVR = MRI.createVirtualRegister(RC); in genAlternativeCodeSequence() local
4558 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in genAlternativeCodeSequence()
4573 unsigned NewVR = MRI.createVirtualRegister(RC); in genAlternativeCodeSequence() local
[all …]
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| H A D | AArch64ISelLowering.cpp | 11822 unsigned NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
11832 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
11839 .addReg(NewVR); in insertCopiesSplitCSR()
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenInsert.cpp | 1403 unsigned NewVR = MRI->createVirtualRegister(RC); in generateInserts() local
1404 RegMap[VR] = NewVR; in generateInserts()
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 1828 unsigned NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
1831 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
1838 .addReg(NewVR); in insertCopiesSplitCSR()
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 14314 unsigned NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
14324 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
14331 .addReg(NewVR); in insertCopiesSplitCSR()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 15140 unsigned NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
15150 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
15157 .addReg(NewVR); in insertCopiesSplitCSR()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 42707 unsigned NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
42717 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
42724 .addReg(NewVR); in insertCopiesSplitCSR()
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